[PATCH] D17133: Sparc back-end: Addition of missing registers.

James Y Knight via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 11 14:29:10 PST 2016


jyknight added a comment.

I'd like for the change that adds the instructions that use these registers to be merged with this change; this is not actually useful standing by itself.


================
Comment at: lib/Target/Sparc/SparcRegisterInfo.td:214
@@ +213,3 @@
+// Co-processor registers
+def C0 : Ri< 0, "C0">, DwarfRegNum<[88]>;
+def C1 : Ri< 1, "C1">, DwarfRegNum<[89]>;
----------------
You can't just make up Dwarf reg numbers, these have to match with other tools like gdb and gcc. And, there aren't any defined for coproc registers, so just leave the DwarfRegNum out.

================
Comment at: lib/Target/Sparc/SparcRegisterInfo.td:374
@@ +373,3 @@
+         C20_C21, C22_C23, C24_C25, C26_C27, C28_C29,
+         C30_C31)>;
+
----------------
This should probably be marked isAllocatable = 0.


http://reviews.llvm.org/D17133





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