[PATCH] D17141: [ARM] Adding IEEE-754 SIMD detection to loop vectorizer

[Renato Golin via llvm-commits]

rengolin created this revision.
rengolin added reviewers: hfinkel, jmolloy, nadav, aschwaighofer.
rengolin added subscribers: llvm-commits, kristof.beyls, aadg.
rengolin set the repository for this revision to rL LLVM.
Herald added subscribers: mzolotukhin, rengolin, aemerson.

Some SIMD implementations are not IEEE-754 compliant, for example ARM's NEON.
This patch teaches the loop vectorizer to only allow transformations of loops
that either contain no floating-point operations or have enough allowance
flags supporting lack of precision, including -ffast-math and other NaN/Inf
related flags.

For that, the target description now has a method which tells us if the
SIMD unit is IEEE-754 compliant, and the vectorizer has a check on every
FP instruction in the candidate loop to check for the safety flags.

Fixes PR16275.

Repository:
  rL LLVM

http://reviews.llvm.org/D17141

Files:
  include/llvm/Analysis/TargetTransformInfo.h
  include/llvm/Analysis/TargetTransformInfoImpl.h
  lib/Analysis/TargetTransformInfo.cpp
  lib/Target/ARM/ARMTargetTransformInfo.h
  lib/Transforms/Vectorize/LoopVectorize.cpp
  test/Transforms/LoopVectorize/ARM/arm-ieee-vectorize.ll

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