[PATCH] D17137: [mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD, DDIVU and DMODU instructions

[Zlatko Buljan via llvm-commits]

zbuljan created this revision.
zbuljan added reviewers: dsanders, hvarga, zoran.jovanovic.
zbuljan added subscribers: petarj, llvm-commits.
Herald added a reviewer: vkalintiris.
Herald added a subscriber: dsanders.

The patch adds CodeGen support for microMIPSr6 DIV, MOD, DIVU, MODU, DDIV, DMOD, DDIVU and DMODU instructions:

- fixed order of registers in encoding definition class for microMIPS64 DDIV, DMOD, DDIVU and DMODU instructions
- updated tests for the standard encodings of DDIV, DMOD, DDIVU and DMODU instructions
- changed description class for microMIPSr6 DIV, MOD, DIVU, MODU, DDIV, DMOD, DDIVU and DMODU instructions:
  * enabled insert of "teq $divisor_reg, $zero, 7" instruction in case of division by zero
- added DAG patterns for proper selection of instructions
- separated microMIPSr6 instructions from equivalent MIPS instructions using NotInMicroMips predicate
- added microMIPS pseudo DIV and DIVU instructions with explicit accumulator register operands
- updated .ll files with tests for microMIPSr6 DIV, MOD, DIVU, MODU, DDIV, DMOD, DDIVU and DMODU instructions
- fixed "Cannot copy registers" assertion:
  * added GPRMM16_64 register class and updated selection of register class for microMIPS64

http://reviews.llvm.org/D17137

Files:
  lib/Target/Mips/MicroMips32r6InstrInfo.td
  lib/Target/Mips/MicroMips64r6InstrFormats.td
  lib/Target/Mips/MicroMips64r6InstrInfo.td
  lib/Target/Mips/MicroMipsInstrInfo.td
  lib/Target/Mips/Mips32r6InstrInfo.td
  lib/Target/Mips/Mips64InstrInfo.td
  lib/Target/Mips/Mips64r6InstrInfo.td
  lib/Target/Mips/MipsISelLowering.cpp
  lib/Target/Mips/MipsInstrInfo.td
  lib/Target/Mips/MipsMachineFunction.cpp
  lib/Target/Mips/MipsRegisterInfo.td
  test/CodeGen/Mips/llvm-ir/sdiv.ll
  test/CodeGen/Mips/llvm-ir/srem.ll
  test/CodeGen/Mips/llvm-ir/udiv.ll
  test/CodeGen/Mips/llvm-ir/urem.ll
  test/MC/Disassembler/Mips/micromips64r6/valid.txt
  test/MC/Mips/micromips64r6/valid.s

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