[PATCH] D17112: AMDGPU: Fix not handling new workitem intrinsics in DivergenceAnalysis
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 10 16:40:49 PST 2016
arsenm created this revision.
arsenm added a reviewer: tstellarAMD.
arsenm added a subscriber: llvm-commits.
Herald added a subscriber: arsenm.
http://reviews.llvm.org/D17112
Files:
lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
test/Analysis/DivergenceAnalysis/AMDGPU/workitem-intrinsics.ll
Index: test/Analysis/DivergenceAnalysis/AMDGPU/workitem-intrinsics.ll
===================================================================
--- /dev/null
+++ test/Analysis/DivergenceAnalysis/AMDGPU/workitem-intrinsics.ll
@@ -0,0 +1,45 @@
+; RUN: opt -mtriple amdgcn-unknown-amdhsa -analyze -divergence %s | FileCheck %s
+
+declare i32 @llvm.amdgcn.workitem.id.x() #0
+declare i32 @llvm.amdgcn.workitem.id.y() #0
+declare i32 @llvm.amdgcn.workitem.id.z() #0
+declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #0
+declare i32 @llvm.amdgcn.mbcnt.hi(i32, i32) #0
+
+; CHECK: DIVERGENT: %id.x = call i32 @llvm.amdgcn.workitem.id.x()
+define void @workitem_id_x() #1 {
+ %id.x = call i32 @llvm.amdgcn.workitem.id.x()
+ store volatile i32 %id.x, i32 addrspace(1)* undef
+ ret void
+}
+
+; CHECK: DIVERGENT: %id.y = call i32 @llvm.amdgcn.workitem.id.y()
+define void @workitem_id_y() #1 {
+ %id.y = call i32 @llvm.amdgcn.workitem.id.y()
+ store volatile i32 %id.y, i32 addrspace(1)* undef
+ ret void
+}
+
+; CHECK: DIVERGENT: %id.z = call i32 @llvm.amdgcn.workitem.id.z()
+define void @workitem_id_z() #1 {
+ %id.z = call i32 @llvm.amdgcn.workitem.id.z()
+ store volatile i32 %id.z, i32 addrspace(1)* undef
+ ret void
+}
+
+; CHECK: DIVERGENT: %mbcnt.lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 0, i32 0)
+define void @mbcnt_lo() #1 {
+ %mbcnt.lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 0, i32 0)
+ store volatile i32 %mbcnt.lo, i32 addrspace(1)* undef
+ ret void
+}
+
+; CHECK: DIVERGENT: %mbcnt.hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 0, i32 0)
+define void @mbcnt_hi() #1 {
+ %mbcnt.hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 0, i32 0)
+ store volatile i32 %mbcnt.hi, i32 addrspace(1)* undef
+ ret void
+}
+
+attributes #0 = { nounwind readnone }
+attributes #1 = { nounwind }
Index: lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+++ lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
@@ -115,6 +115,9 @@
// IntrinsicsAMDGPU.td
break;
+ case Intrinsic::amdgcn_workitem_id_x:
+ case Intrinsic::amdgcn_workitem_id_y:
+ case Intrinsic::amdgcn_workitem_id_z:
case Intrinsic::amdgcn_interp_p1:
case Intrinsic::amdgcn_interp_p2:
case Intrinsic::amdgcn_mbcnt_hi:
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