[PATCH] D17041: [X86] Don't assume that a shuffle operand is #0: it isn't for VPERMV.

Wed Feb 10 11:06:53 PST 2016

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> -----Original Message-----

> From: llvm-commits [mailto:llvm-commits-bounces at lists.llvm.org] On Behalf

> Of Sanjay Patel via llvm-commits

> Sent: Wednesday, February 10, 2016 10:58 AM

> To: ahmed.bougacha at gmail.com; llvm-dev at redking.me.uk;

> spatel at rotateright.com

> Cc: llvm-commits at lists.llvm.org

> Subject: Re: [PATCH] http://reviews.llvm.org/D17041: [X86] Don't assume that a shuffle operand is

> #0: it isn't for VPERMV.

> 

> spatel added a comment.

> 

> In http://reviews.llvm.org/D17041#348716, @ab wrote:

> 

> > ..but now that I look it up, the AVX-512 intrinsics use the instruction order

> 

> 

> *sigh*

> 

> >   Back to square one.

> 

> 

> Wow. Is it too late for Intel to fix/deprecate/rename those intrinsics? If the

> argument is that the intrinsics should match the asm, then what happened

> with the AVX2 vperm variants?

It is really too late.  There are several other tool chains that already implemented the intrinsics as defined, and have been in use for quite a while.

> http://reviews.llvm.org/D17041

> 

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http://reviews.llvm.org/D17041