[PATCH] D15745: [mips] added support for trunc macro

[Daniel Sanders via llvm-commits]

dsanders accepted this revision.
dsanders added a comment.
This revision is now accepted and ready to land.

LGTM with a few nits


================
Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:3060
@@ +3059,3 @@
+    emitRR(Mips::CFC1, ThirdReg, Mips::RA, IDLoc, Instructions);
+    createNop(hasShortDelaySlot(Inst.getOpcode()), IDLoc, Instructions);
+    emitRRI(Mips::ORi, ATReg, ThirdReg, 0x3, IDLoc, Instructions);
----------------
Shouldn't the ``hasShortDelaySlot(Inst.getOpcode())`` part be based on the properties of CFC1 rather than Inst? Also, it's not really a delay slot, it's a hazard. hasShortDelaySlot() will always return false for CFC1 and the trunc macros.
I think we should just hard code it to true/false (with a comment explaining why) until we represent hazards in tablegen

================
Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:3064
@@ +3063,3 @@
+    emitRR(Mips::CTC1, Mips::RA, ATReg, IDLoc, Instructions);
+    createNop(hasShortDelaySlot(Inst.getOpcode()), IDLoc, Instructions);
+    emitRR(IsDouble ? (Is64FPU ? Mips::CVT_W_D64 : Mips::CVT_W_D32)
----------------
Likewise

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Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:3069
@@ +3068,3 @@
+    emitRR(Mips::CTC1, Mips::RA, ThirdReg, IDLoc, Instructions);
+    createNop(hasShortDelaySlot(Inst.getOpcode()), IDLoc, Instructions);
+    return false;
----------------
Likewise

================
Comment at: test/MC/Mips/mips64/valid.s:288-289
@@ -288,1 +287,4 @@
+        trunc.w.s $f28,$f30            # CHECK: trunc.w.s $f28, $f30    # encoding: [0x46,0x00,0xf7,0x0d]
+        trunc.w.d $f4,$f6,$4           # CHECK: trunc.w.d $f4, $f6     # encoding: [0x46,0x20,0x31,0x0d]
+        trunc.w.s $f4,$f6,$4           # CHECK: trunc.w.s $f4, $f6     # encoding: [0x46,0x00,0x31,0x0d]
         xor       $s2,$a0,$s8
----------------
Indentation

================
Comment at: test/MC/Mips/mips64r2/valid.s:314-315
@@ -314,1 +313,4 @@
+        trunc.w.s $f28,$f30            # CHECK: trunc.w.s $f28, $f30    # encoding: [0x46,0x00,0xf7,0x0d]
+        trunc.w.d $f4,$f6,$4           # CHECK: trunc.w.d $f4, $f6     # encoding: [0x46,0x20,0x31,0x0d]
+        trunc.w.s $f4,$f6,$4           # CHECK: trunc.w.s $f4, $f6     # encoding: [0x46,0x00,0x31,0x0d]
         xor       $s2,$a0,$s8
----------------
Indentation

================
Comment at: test/MC/Mips/mips64r3/valid.s:314-315
@@ -314,1 +313,4 @@
+        trunc.w.s $f28,$f30            # CHECK: trunc.w.s $f28, $f30    # encoding: [0x46,0x00,0xf7,0x0d]
+        trunc.w.d $f4,$f6,$4           # CHECK: trunc.w.d $f4, $f6     # encoding: [0x46,0x20,0x31,0x0d]
+        trunc.w.s $f4,$f6,$4           # CHECK: trunc.w.s $f4, $f6     # encoding: [0x46,0x00,0x31,0x0d]
         xor       $s2,$a0,$s8
----------------
Indentation

================
Comment at: test/MC/Mips/mips64r5/valid.s:315-316
@@ -315,1 +314,4 @@
+        trunc.w.s $f28,$f30            # CHECK: trunc.w.s $f28, $f30    # encoding: [0x46,0x00,0xf7,0x0d]
+        trunc.w.d $f4,$f6,$4           # CHECK: trunc.w.d $f4, $f6     # encoding: [0x46,0x20,0x31,0x0d]
+        trunc.w.s $f4,$f6,$4           # CHECK: trunc.w.s $f4, $f6     # encoding: [0x46,0x00,0x31,0x0d]
         xor       $s2,$a0,$s8
----------------
Indentation


http://reviews.llvm.org/D15745