[PATCH] D16982: [ELF][MIPS] Add lazy relocation support for MIPS

[Rui Ueyama via llvm-commits]

ruiu added inline comments.

================
Comment at: ELF/Target.cpp:201-202
@@ -198,1 +200,4 @@
+  void writePlt(uint8_t *Buf, uint64_t GotEntryAddr,
+                     uint64_t PltEntryAddr, int32_t Index,
+                     unsigned RelOff) const override;
   void writeGotHeader(uint8_t *Buf) const override;
----------------
indentation

================
Comment at: ELF/Target.cpp:1455
@@ +1454,3 @@
+    checkAlignment<(1 << SHIFT)>(SA + A, Type);
+  int64_t V = SA + A - P;
+  checkInt<BSIZE + SHIFT>(V, Type);
----------------
SA + A?  "SA" means S+A, so it implies that an addend is added twice, or we have two different addends.

================
Comment at: ELF/Target.cpp:1463
@@ +1462,3 @@
+  uint32_t Instr = read32<E>(Loc);
+  write32<E>(Loc, (Instr & 0xffff0000) | mipsHigh(SA + A));
+}
----------------
Ditto

================
Comment at: ELF/Target.cpp:1468-1492
@@ +1467,27 @@
+void MipsTargetInfo<ELFT>::writePltZero(uint8_t *Buf) const {
+  if (ELFT::TargetEndianness == llvm::support::big) {
+    const uint8_t PltData[] = {
+        0x3c, 0x1c, 0x00, 0x00, // lui   $28, %hi(&GOTPLT[0])
+        0x8f, 0x99, 0x00, 0x00, // lw    $25, %lo(&GOTPLT[0])($28)
+        0x27, 0x9c, 0x00, 0x00, // addiu $28, $28, %lo(&GOTPLT[0])
+        0x03, 0x1c, 0xc0, 0x23, // subu  $24, $24, $28
+        0x03, 0xe0, 0x78, 0x25, // move  $15, $31
+        0x00, 0x18, 0xc0, 0x82, // srl   $24, $24, 2
+        0x03, 0x20, 0xf8, 0x09, // jalr  $25
+        0x27, 0x18, 0xff, 0xfe  // subu  $24, $24, 2
+    };
+    memcpy(Buf, PltData, sizeof(PltData));
+  } else {
+    const uint8_t PltData[] = {
+        0x00, 0x00, 0x1c, 0x3c, // lui   $28, %hi(&GOTPLT[0])
+        0x00, 0x00, 0x99, 0x8f, // lw    $25, %lo(&GOTPLT[0])($28)
+        0x00, 0x00, 0x9c, 0x27, // addiu $28, $28, %lo(&GOTPLT[0])
+        0x23, 0xc0, 0x1c, 0x03, // subu  $24, $24, $28
+        0x25, 0x78, 0xe0, 0x03, // move  $15, $31
+        0x82, 0xc0, 0x18, 0x00, // srl   $24, $24, 2
+        0x09, 0xf8, 0x20, 0x03, // jalr  $25
+        0xfe, 0xff, 0x18, 0x27  // subu  $24, $24, 2
+    };
+    memcpy(Buf, PltData, sizeof(PltData));
+  }
+  uint64_t Got = Out<ELFT>::GotPlt->getVA();
----------------
I'd reduce the code duplication by

  write32<E>(Buf, 0x3c1c0000);     // lui ...
  write32<E>(Buf + 4, 0x8f990000); // lw ...
  write32<E>(Buf + 8, ...


================
Comment at: ELF/Target.cpp:1504-1520
@@ +1503,19 @@
+                                    unsigned RelOff) const {
+  if (ELFT::TargetEndianness == llvm::support::big) {
+    const uint8_t Inst[] = {
+        0x3c, 0x0f, 0x00, 0x00, // lui   $15, %hi(.got.plt entry)
+        0x8d, 0xf9, 0x00, 0x00, // l[wd] $25, %lo(.got.plt entry)($15)
+        0x03, 0x20, 0x00, 0x08, // jr    $25
+        0x25, 0xf8, 0x00, 0x00  // addiu $24, $15, %lo(.got.plt entry)
+    };
+    memcpy(Buf, Inst, sizeof(Inst));
+  } else {
+    const uint8_t Inst[] = {
+        0x00, 0x00, 0x0f, 0x3c, // lui   $15, %hi(.got.plt entry)
+        0x00, 0x00, 0xf9, 0x8d, // l[wd] $25, %lo(.got.plt entry)($15)
+        0x08, 0x00, 0x20, 0x03, // jr    $25
+        0x00, 0x00, 0xf8, 0x25  // addiu $24, $15, %lo(.got.plt entry)
+    };
+    memcpy(Buf, Inst, sizeof(Inst));
+  }
+  applyMipsHi16Reloc<ELFT::TargetEndianness>(Buf, GotEntryAddr, 0);
----------------
Ditto

================
Comment at: ELF/Target.cpp:1539-1541
@@ -1442,3 +1538,5 @@
 bool MipsTargetInfo<ELFT>::needsGot(uint32_t Type, const SymbolBody &S) const {
+  if (needsPlt(Type, S))
+    return true;
   return Type == R_MIPS_GOT16 || Type == R_MIPS_CALL16;
 }
----------------
  return Type == R_MIPS_GOT16 || Type == R_MIPS_CALL16 || needsPlt(Type, S);


Repository:
  rL LLVM

http://reviews.llvm.org/D16982