[PATCH] D17047: AMDGPU: Move SILowerControlFlowPass to be post-regalloc

[Matt Arsenault via llvm-commits]

arsenm created this revision.
arsenm added a reviewer: tstellarAMD.
arsenm added a subscriber: llvm-commits.
Herald added a subscriber: arsenm.

Currently this is inserting a prologue into the function.
Move this before PEI so we can emit the prologue there
for flat_scratch and m0 initialization.


http://reviews.llvm.org/D17047

Files:
  lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

Index: lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -355,14 +355,14 @@
 
 void GCNPassConfig::addPostRegAlloc() {
   addPass(createSIShrinkInstructionsPass(), false);
+  addPass(createSILowerControlFlowPass(*TM), false);
 }
 
 void GCNPassConfig::addPreSched2() {
 }
 
 void GCNPassConfig::addPreEmitPass() {
   addPass(createSIInsertWaitsPass(), false);
-  addPass(createSILowerControlFlowPass(*TM), false);
 }
 
 TargetPassConfig *GCNTargetMachine::createPassConfig(PassManagerBase &PM) {


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D17047.47380.patch
Type: text/x-patch
Size: 651 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20160209/c4482427/attachment.bin>