[PATCH] D16972: [SelectionDAG] change getConstant() to use the input SDLoc when building splat vectors

[Sanjay Patel via llvm-commits]

spatel created this revision.
spatel added reviewers: hfinkel, qcolombet, sunfish.
spatel added a subscriber: llvm-commits.
Herald added subscribers: mcrosier, aemerson.

The change is simple enough (assuming it's what we want): instead of attaching an anonymous SDLoc to splatted vector constants, use the scalar constant's existing SDLoc since that is what is passed into getConstant() as a param. The changes in instruction scheduling seem harmless to me, but I'll explain why that happens.

The motivation for this patch starts near:
http://reviews.llvm.org/rL258833
...I made a note to myself that x86's getZeroVector() could be similarly cleaned up and thought it would be 'NFC' as well. But when I made that change locally, several x86 codegen tests wiggled.

It turns out that the lack of SDLoc consistency in getConstant() changes the way ScheduleDAGRRList behaves. This is because the SDLoc contains 'IROrder' and some DAG scheduler algorithms use IROrder for tie-breaking. I suppose this is working as intended, although it's a bit surprising to me that SDLoc's can have this effect on codegen.

http://reviews.llvm.org/D16972

Files:
  lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  test/CodeGen/X86/sse41.ll
  test/CodeGen/X86/vec_ctbits.ll
  test/CodeGen/X86/vector-shuffle-v1.ll

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