[PATCH] D16956: [X86][SSE1] Add MOVLHPS/MOVHLPS lowering and memory folding support

[Sanjay Patel via llvm-commits]

spatel added a comment.

Shouldn't MOVHPS/MOVLPS/MOVLHPS/MOVHLPS be in "hasPartialRegUpdate()"? I wonder if the partial reg update is why we weren't trying to lower these before.

If that's correct, I think a FIXME comment is fine for now.


================
Comment at: lib/Target/X86/X86InstrInfo.cpp:5541-5549
@@ +5540,11 @@
+    if (OpNum == 2) {
+        unsigned RCSize = getRegClass(MI->getDesc(), OpNum, &RI, MF)->getSize();
+        if (Size <= RCSize && 8 <= Align) {
+          unsigned NewOpCode =
+              (MI->getOpcode() == X86::VMOVHLPSrr ? X86::VMOVLPSrm
+                                                  : X86::MOVLPSrm);
+          MachineInstr *NewMI =
+            FuseInst(MF, NewOpCode, OpNum, MOs, InsertPt, MI, *this, 8);
+          return NewMI;
+        }
+    }
----------------
Extra indent here.

================
Comment at: lib/Target/X86/X86InstrInfo.cpp:5542
@@ +5541,3 @@
+        unsigned RCSize = getRegClass(MI->getDesc(), OpNum, &RI, MF)->getSize();
+        if (Size <= RCSize && 8 <= Align) {
+          unsigned NewOpCode =
----------------
Does the AVX case doesn't need the alignment restriction? I don't think we'd actually generate this instruction in the first place if we have AVX, so it might be a moot point. But maybe worthy of a code comment.


Repository:
  rL LLVM

http://reviews.llvm.org/D16956