[llvm] r260000 - [X86][AVX512] Fixed prefix ordering for lzcnt tests.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Feb 6 10:07:19 PST 2016
Author: rksimon
Date: Sat Feb 6 12:07:19 2016
New Revision: 260000
URL: http://llvm.org/viewvc/llvm-project?rev=260000&view=rev
Log:
[X86][AVX512] Fixed prefix ordering for lzcnt tests.
Let AVX512 targets share the same CHECKs.
Modified:
llvm/trunk/test/CodeGen/X86/vector-lzcnt-128.ll
llvm/trunk/test/CodeGen/X86/vector-lzcnt-256.ll
llvm/trunk/test/CodeGen/X86/vector-lzcnt-512.ll
Modified: llvm/trunk/test/CodeGen/X86/vector-lzcnt-128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-lzcnt-128.ll?rev=260000&r1=259999&r2=260000&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-lzcnt-128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-lzcnt-128.ll Sat Feb 6 12:07:19 2016
@@ -1,11 +1,12 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE3
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSSE3
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512cd -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512VLCD --check-prefix=ALL --check-prefix=AVX512
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512cd | FileCheck %s --check-prefix=AVX512CD --check-prefix=ALL --check-prefix=AVX512
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512cd -mattr=+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512VLCD
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512cd | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512CD
define <2 x i64> @testv2i64(<2 x i64> %in) nounwind {
; SSE2-LABEL: testv2i64:
@@ -1469,21 +1470,13 @@ define <16 x i8> @testv16i8(<16 x i8> %i
; AVX-NEXT: vpinsrb $15, %ecx, %xmm1, %xmm0
; AVX-NEXT: retq
;
-; AVX512VLCD-LABEL: testv16i8:
-; AVX512VLCD: ## BB#0:
-; AVX512VLCD-NEXT: vpmovzxbd %xmm0, %zmm0
-; AVX512VLCD-NEXT: vplzcntd %zmm0, %zmm0
-; AVX512VLCD-NEXT: vpmovdb %zmm0, %xmm0
-; AVX512VLCD-NEXT: vpsubb {{.*}}(%rip), %xmm0, %xmm0
-; AVX512VLCD-NEXT: retq
-;
-; AVX512CD-LABEL: testv16i8:
-; AVX512CD: ## BB#0:
-; AVX512CD-NEXT: vpmovzxbd %xmm0, %zmm0
-; AVX512CD-NEXT: vplzcntd %zmm0, %zmm0
-; AVX512CD-NEXT: vpmovdb %zmm0, %xmm0
-; AVX512CD-NEXT: vpsubb {{.*}}(%rip), %xmm0, %xmm0
-; AVX512CD-NEXT: retq
+; AVX512-LABEL: testv16i8:
+; AVX512: ## BB#0:
+; AVX512-NEXT: vpmovzxbd %xmm0, %zmm0
+; AVX512-NEXT: vplzcntd %zmm0, %zmm0
+; AVX512-NEXT: vpmovdb %zmm0, %xmm0
+; AVX512-NEXT: vpsubb {{.*}}(%rip), %xmm0, %xmm0
+; AVX512-NEXT: retq
%out = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %in, i1 0)
ret <16 x i8> %out
}
@@ -1884,21 +1877,13 @@ define <16 x i8> @testv16i8u(<16 x i8> %
; AVX-NEXT: vpinsrb $15, %eax, %xmm1, %xmm0
; AVX-NEXT: retq
;
-; AVX512VLCD-LABEL: testv16i8u:
-; AVX512VLCD: ## BB#0:
-; AVX512VLCD-NEXT: vpmovzxbd %xmm0, %zmm0
-; AVX512VLCD-NEXT: vplzcntd %zmm0, %zmm0
-; AVX512VLCD-NEXT: vpmovdb %zmm0, %xmm0
-; AVX512VLCD-NEXT: vpsubb {{.*}}(%rip), %xmm0, %xmm0
-; AVX512VLCD-NEXT: retq
-;
-; AVX512CD-LABEL: testv16i8u:
-; AVX512CD: ## BB#0:
-; AVX512CD-NEXT: vpmovzxbd %xmm0, %zmm0
-; AVX512CD-NEXT: vplzcntd %zmm0, %zmm0
-; AVX512CD-NEXT: vpmovdb %zmm0, %xmm0
-; AVX512CD-NEXT: vpsubb {{.*}}(%rip), %xmm0, %xmm0
-; AVX512CD-NEXT: retq
+; AVX512-LABEL: testv16i8u:
+; AVX512: ## BB#0:
+; AVX512-NEXT: vpmovzxbd %xmm0, %zmm0
+; AVX512-NEXT: vplzcntd %zmm0, %zmm0
+; AVX512-NEXT: vpmovdb %zmm0, %xmm0
+; AVX512-NEXT: vpsubb {{.*}}(%rip), %xmm0, %xmm0
+; AVX512-NEXT: retq
%out = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %in, i1 -1)
ret <16 x i8> %out
}
@@ -1916,17 +1901,11 @@ define <2 x i64> @foldv2i64() nounwind {
; AVX-NEXT: vmovq %rax, %xmm0
; AVX-NEXT: retq
;
-; AVX512VLCD-LABEL: foldv2i64:
-; AVX512VLCD: ## BB#0:
-; AVX512VLCD-NEXT: movl $55, %eax
-; AVX512VLCD-NEXT: vmovq %rax, %xmm0
-; AVX512VLCD-NEXT: retq
-;
-; AVX512CD-LABEL: foldv2i64:
-; AVX512CD: ## BB#0:
-; AVX512CD-NEXT: movl $55, %eax
-; AVX512CD-NEXT: vmovq %rax, %xmm0
-; AVX512CD-NEXT: retq
+; AVX512-LABEL: foldv2i64:
+; AVX512: ## BB#0:
+; AVX512-NEXT: movl $55, %eax
+; AVX512-NEXT: vmovq %rax, %xmm0
+; AVX512-NEXT: retq
%out = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> <i64 256, i64 -1>, i1 0)
ret <2 x i64> %out
}
@@ -1944,17 +1923,11 @@ define <2 x i64> @foldv2i64u() nounwind
; AVX-NEXT: vmovq %rax, %xmm0
; AVX-NEXT: retq
;
-; AVX512VLCD-LABEL: foldv2i64u:
-; AVX512VLCD: ## BB#0:
-; AVX512VLCD-NEXT: movl $55, %eax
-; AVX512VLCD-NEXT: vmovq %rax, %xmm0
-; AVX512VLCD-NEXT: retq
-;
-; AVX512CD-LABEL: foldv2i64u:
-; AVX512CD: ## BB#0:
-; AVX512CD-NEXT: movl $55, %eax
-; AVX512CD-NEXT: vmovq %rax, %xmm0
-; AVX512CD-NEXT: retq
+; AVX512-LABEL: foldv2i64u:
+; AVX512: ## BB#0:
+; AVX512-NEXT: movl $55, %eax
+; AVX512-NEXT: vmovq %rax, %xmm0
+; AVX512-NEXT: retq
%out = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> <i64 256, i64 -1>, i1 -1)
ret <2 x i64> %out
}
Modified: llvm/trunk/test/CodeGen/X86/vector-lzcnt-256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-lzcnt-256.ll?rev=260000&r1=259999&r2=260000&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-lzcnt-256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-lzcnt-256.ll Sat Feb 6 12:07:19 2016
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512cd -mattr=+avx512vl| FileCheck %s --check-prefix=AVX512VLCD --check-prefix=ALL --check-prefix=AVX512
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512cd | FileCheck %s --check-prefix=AVX512CD --check-prefix=ALL --check-prefix=AVX512
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512cd -mattr=+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512VLCD
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512cd | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512CD
define <4 x i64> @testv4i64(<4 x i64> %in) nounwind {
; AVX1-LABEL: testv4i64:
@@ -515,21 +515,13 @@ define <16 x i16> @testv16i16(<16 x i16>
; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512VLCD-LABEL: testv16i16:
-; AVX512VLCD: ## BB#0:
-; AVX512VLCD-NEXT: vpmovzxwd %ymm0, %zmm0
-; AVX512VLCD-NEXT: vplzcntd %zmm0, %zmm0
-; AVX512VLCD-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512VLCD-NEXT: vpsubw {{.*}}(%rip), %ymm0, %ymm0
-; AVX512VLCD-NEXT: retq
-;
-; AVX512CD-LABEL: testv16i16:
-; AVX512CD: ## BB#0:
-; AVX512CD-NEXT: vpmovzxwd %ymm0, %zmm0
-; AVX512CD-NEXT: vplzcntd %zmm0, %zmm0
-; AVX512CD-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512CD-NEXT: vpsubw {{.*}}(%rip), %ymm0, %ymm0
-; AVX512CD-NEXT: retq
+; AVX512-LABEL: testv16i16:
+; AVX512: ## BB#0:
+; AVX512-NEXT: vpmovzxwd %ymm0, %zmm0
+; AVX512-NEXT: vplzcntd %zmm0, %zmm0
+; AVX512-NEXT: vpmovdw %zmm0, %ymm0
+; AVX512-NEXT: vpsubw {{.*}}(%rip), %ymm0, %ymm0
+; AVX512-NEXT: retq
%out = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %in, i1 0)
ret <16 x i16> %out
}
@@ -675,21 +667,13 @@ define <16 x i16> @testv16i16u(<16 x i16
; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512VLCD-LABEL: testv16i16u:
-; AVX512VLCD: ## BB#0:
-; AVX512VLCD-NEXT: vpmovzxwd %ymm0, %zmm0
-; AVX512VLCD-NEXT: vplzcntd %zmm0, %zmm0
-; AVX512VLCD-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512VLCD-NEXT: vpsubw {{.*}}(%rip), %ymm0, %ymm0
-; AVX512VLCD-NEXT: retq
-;
-; AVX512CD-LABEL: testv16i16u:
-; AVX512CD: ## BB#0:
-; AVX512CD-NEXT: vpmovzxwd %ymm0, %zmm0
-; AVX512CD-NEXT: vplzcntd %zmm0, %zmm0
-; AVX512CD-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512CD-NEXT: vpsubw {{.*}}(%rip), %ymm0, %ymm0
-; AVX512CD-NEXT: retq
+; AVX512-LABEL: testv16i16u:
+; AVX512: ## BB#0:
+; AVX512-NEXT: vpmovzxwd %ymm0, %zmm0
+; AVX512-NEXT: vplzcntd %zmm0, %zmm0
+; AVX512-NEXT: vpmovdw %zmm0, %ymm0
+; AVX512-NEXT: vpsubw {{.*}}(%rip), %ymm0, %ymm0
+; AVX512-NEXT: retq
%out = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %in, i1 -1)
ret <16 x i16> %out
}
Modified: llvm/trunk/test/CodeGen/X86/vector-lzcnt-512.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-lzcnt-512.ll?rev=260000&r1=259999&r2=260000&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-lzcnt-512.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-lzcnt-512.ll Sat Feb 6 12:07:19 2016
@@ -1,5 +1,6 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512cd | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512CD
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw | FileCheck %s --check-prefix=AVX512BW
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512BW
define <8 x i64> @testv8i64(<8 x i64> %in) nounwind {
; ALL-LABEL: testv8i64:
@@ -38,18 +39,18 @@ define <16 x i32> @testv16i32u(<16 x i32
}
define <32 x i16> @testv32i16(<32 x i16> %in) nounwind {
-; ALL-LABEL: testv32i16:
-; ALL: ## BB#0:
-; ALL-NEXT: vpmovzxwd %ymm0, %zmm0
-; ALL-NEXT: vplzcntd %zmm0, %zmm0
-; ALL-NEXT: vpmovdw %zmm0, %ymm0
-; ALL-NEXT: vmovdqa {{.*#+}} ymm2 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
-; ALL-NEXT: vpsubw %ymm2, %ymm0, %ymm0
-; ALL-NEXT: vpmovzxwd %ymm1, %zmm1
-; ALL-NEXT: vplzcntd %zmm1, %zmm1
-; ALL-NEXT: vpmovdw %zmm1, %ymm1
-; ALL-NEXT: vpsubw %ymm2, %ymm1, %ymm1
-; ALL-NEXT: retq
+; AVX512CD-LABEL: testv32i16:
+; AVX512CD: ## BB#0:
+; AVX512CD-NEXT: vpmovzxwd %ymm0, %zmm0
+; AVX512CD-NEXT: vplzcntd %zmm0, %zmm0
+; AVX512CD-NEXT: vpmovdw %zmm0, %ymm0
+; AVX512CD-NEXT: vmovdqa {{.*#+}} ymm2 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; AVX512CD-NEXT: vpsubw %ymm2, %ymm0, %ymm0
+; AVX512CD-NEXT: vpmovzxwd %ymm1, %zmm1
+; AVX512CD-NEXT: vplzcntd %zmm1, %zmm1
+; AVX512CD-NEXT: vpmovdw %zmm1, %ymm1
+; AVX512CD-NEXT: vpsubw %ymm2, %ymm1, %ymm1
+; AVX512CD-NEXT: retq
;
; AVX512BW-LABEL: testv32i16:
; AVX512BW: ## BB#0:
@@ -70,18 +71,18 @@ define <32 x i16> @testv32i16(<32 x i16>
}
define <32 x i16> @testv32i16u(<32 x i16> %in) nounwind {
-; ALL-LABEL: testv32i16u:
-; ALL: ## BB#0:
-; ALL-NEXT: vpmovzxwd %ymm0, %zmm0
-; ALL-NEXT: vplzcntd %zmm0, %zmm0
-; ALL-NEXT: vpmovdw %zmm0, %ymm0
-; ALL-NEXT: vmovdqa {{.*#+}} ymm2 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
-; ALL-NEXT: vpsubw %ymm2, %ymm0, %ymm0
-; ALL-NEXT: vpmovzxwd %ymm1, %zmm1
-; ALL-NEXT: vplzcntd %zmm1, %zmm1
-; ALL-NEXT: vpmovdw %zmm1, %ymm1
-; ALL-NEXT: vpsubw %ymm2, %ymm1, %ymm1
-; ALL-NEXT: retq
+; AVX512CD-LABEL: testv32i16u:
+; AVX512CD: ## BB#0:
+; AVX512CD-NEXT: vpmovzxwd %ymm0, %zmm0
+; AVX512CD-NEXT: vplzcntd %zmm0, %zmm0
+; AVX512CD-NEXT: vpmovdw %zmm0, %ymm0
+; AVX512CD-NEXT: vmovdqa {{.*#+}} ymm2 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; AVX512CD-NEXT: vpsubw %ymm2, %ymm0, %ymm0
+; AVX512CD-NEXT: vpmovzxwd %ymm1, %zmm1
+; AVX512CD-NEXT: vplzcntd %zmm1, %zmm1
+; AVX512CD-NEXT: vpmovdw %zmm1, %ymm1
+; AVX512CD-NEXT: vpsubw %ymm2, %ymm1, %ymm1
+; AVX512CD-NEXT: retq
;
; AVX512BW-LABEL: testv32i16u:
; AVX512BW: ## BB#0:
@@ -102,30 +103,30 @@ define <32 x i16> @testv32i16u(<32 x i16
}
define <64 x i8> @testv64i8(<64 x i8> %in) nounwind {
-; ALL-LABEL: testv64i8:
-; ALL: ## BB#0:
-; ALL-NEXT: vextractf128 $1, %ymm0, %xmm2
-; ALL-NEXT: vpmovzxbd %xmm2, %zmm2
-; ALL-NEXT: vplzcntd %zmm2, %zmm2
-; ALL-NEXT: vpmovdb %zmm2, %xmm2
-; ALL-NEXT: vmovdqa {{.*#+}} xmm3 = [24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,24]
-; ALL-NEXT: vpsubb %xmm3, %xmm2, %xmm2
-; ALL-NEXT: vpmovzxbd %xmm0, %zmm0
-; ALL-NEXT: vplzcntd %zmm0, %zmm0
-; ALL-NEXT: vpmovdb %zmm0, %xmm0
-; ALL-NEXT: vpsubb %xmm3, %xmm0, %xmm0
-; ALL-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
-; ALL-NEXT: vextractf128 $1, %ymm1, %xmm2
-; ALL-NEXT: vpmovzxbd %xmm2, %zmm2
-; ALL-NEXT: vplzcntd %zmm2, %zmm2
-; ALL-NEXT: vpmovdb %zmm2, %xmm2
-; ALL-NEXT: vpsubb %xmm3, %xmm2, %xmm2
-; ALL-NEXT: vpmovzxbd %xmm1, %zmm1
-; ALL-NEXT: vplzcntd %zmm1, %zmm1
-; ALL-NEXT: vpmovdb %zmm1, %xmm1
-; ALL-NEXT: vpsubb %xmm3, %xmm1, %xmm1
-; ALL-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1
-; ALL-NEXT: retq
+; AVX512CD-LABEL: testv64i8:
+; AVX512CD: ## BB#0:
+; AVX512CD-NEXT: vextractf128 $1, %ymm0, %xmm2
+; AVX512CD-NEXT: vpmovzxbd %xmm2, %zmm2
+; AVX512CD-NEXT: vplzcntd %zmm2, %zmm2
+; AVX512CD-NEXT: vpmovdb %zmm2, %xmm2
+; AVX512CD-NEXT: vmovdqa {{.*#+}} xmm3 = [24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,24]
+; AVX512CD-NEXT: vpsubb %xmm3, %xmm2, %xmm2
+; AVX512CD-NEXT: vpmovzxbd %xmm0, %zmm0
+; AVX512CD-NEXT: vplzcntd %zmm0, %zmm0
+; AVX512CD-NEXT: vpmovdb %zmm0, %xmm0
+; AVX512CD-NEXT: vpsubb %xmm3, %xmm0, %xmm0
+; AVX512CD-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
+; AVX512CD-NEXT: vextractf128 $1, %ymm1, %xmm2
+; AVX512CD-NEXT: vpmovzxbd %xmm2, %zmm2
+; AVX512CD-NEXT: vplzcntd %zmm2, %zmm2
+; AVX512CD-NEXT: vpmovdb %zmm2, %xmm2
+; AVX512CD-NEXT: vpsubb %xmm3, %xmm2, %xmm2
+; AVX512CD-NEXT: vpmovzxbd %xmm1, %zmm1
+; AVX512CD-NEXT: vplzcntd %zmm1, %zmm1
+; AVX512CD-NEXT: vpmovdb %zmm1, %xmm1
+; AVX512CD-NEXT: vpsubb %xmm3, %xmm1, %xmm1
+; AVX512CD-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1
+; AVX512CD-NEXT: retq
;
; AVX512BW-LABEL: testv64i8:
; AVX512BW: ## BB#0:
@@ -158,30 +159,30 @@ define <64 x i8> @testv64i8(<64 x i8> %i
}
define <64 x i8> @testv64i8u(<64 x i8> %in) nounwind {
-; ALL-LABEL: testv64i8u:
-; ALL: ## BB#0:
-; ALL-NEXT: vextractf128 $1, %ymm0, %xmm2
-; ALL-NEXT: vpmovzxbd %xmm2, %zmm2
-; ALL-NEXT: vplzcntd %zmm2, %zmm2
-; ALL-NEXT: vpmovdb %zmm2, %xmm2
-; ALL-NEXT: vmovdqa {{.*#+}} xmm3 = [24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,24]
-; ALL-NEXT: vpsubb %xmm3, %xmm2, %xmm2
-; ALL-NEXT: vpmovzxbd %xmm0, %zmm0
-; ALL-NEXT: vplzcntd %zmm0, %zmm0
-; ALL-NEXT: vpmovdb %zmm0, %xmm0
-; ALL-NEXT: vpsubb %xmm3, %xmm0, %xmm0
-; ALL-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
-; ALL-NEXT: vextractf128 $1, %ymm1, %xmm2
-; ALL-NEXT: vpmovzxbd %xmm2, %zmm2
-; ALL-NEXT: vplzcntd %zmm2, %zmm2
-; ALL-NEXT: vpmovdb %zmm2, %xmm2
-; ALL-NEXT: vpsubb %xmm3, %xmm2, %xmm2
-; ALL-NEXT: vpmovzxbd %xmm1, %zmm1
-; ALL-NEXT: vplzcntd %zmm1, %zmm1
-; ALL-NEXT: vpmovdb %zmm1, %xmm1
-; ALL-NEXT: vpsubb %xmm3, %xmm1, %xmm1
-; ALL-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1
-; ALL-NEXT: retq
+; AVX512CD-LABEL: testv64i8u:
+; AVX512CD: ## BB#0:
+; AVX512CD-NEXT: vextractf128 $1, %ymm0, %xmm2
+; AVX512CD-NEXT: vpmovzxbd %xmm2, %zmm2
+; AVX512CD-NEXT: vplzcntd %zmm2, %zmm2
+; AVX512CD-NEXT: vpmovdb %zmm2, %xmm2
+; AVX512CD-NEXT: vmovdqa {{.*#+}} xmm3 = [24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,24]
+; AVX512CD-NEXT: vpsubb %xmm3, %xmm2, %xmm2
+; AVX512CD-NEXT: vpmovzxbd %xmm0, %zmm0
+; AVX512CD-NEXT: vplzcntd %zmm0, %zmm0
+; AVX512CD-NEXT: vpmovdb %zmm0, %xmm0
+; AVX512CD-NEXT: vpsubb %xmm3, %xmm0, %xmm0
+; AVX512CD-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
+; AVX512CD-NEXT: vextractf128 $1, %ymm1, %xmm2
+; AVX512CD-NEXT: vpmovzxbd %xmm2, %zmm2
+; AVX512CD-NEXT: vplzcntd %zmm2, %zmm2
+; AVX512CD-NEXT: vpmovdb %zmm2, %xmm2
+; AVX512CD-NEXT: vpsubb %xmm3, %xmm2, %xmm2
+; AVX512CD-NEXT: vpmovzxbd %xmm1, %zmm1
+; AVX512CD-NEXT: vplzcntd %zmm1, %zmm1
+; AVX512CD-NEXT: vpmovdb %zmm1, %xmm1
+; AVX512CD-NEXT: vpsubb %xmm3, %xmm1, %xmm1
+; AVX512CD-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1
+; AVX512CD-NEXT: retq
;
; AVX512BW-LABEL: testv64i8u:
; AVX512BW: ## BB#0:
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