[PATCH] D16937: Add icmp and conditional branches in the C API echo test.
Amaury SECHET via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 5 18:07:41 PST 2016
deadalnix updated this revision to Diff 47070.
deadalnix added a comment.
Test all predicates
http://reviews.llvm.org/D16937
Files:
test/Bindings/llvm-c/echo.ll
tools/llvm-c-test/echo.cpp
Index: tools/llvm-c-test/echo.cpp
===================================================================
--- tools/llvm-c-test/echo.cpp
+++ tools/llvm-c-test/echo.cpp
@@ -216,8 +216,19 @@
break;
}
case LLVMBr: {
- LLVMBasicBlockRef SrcBB = LLVMValueAsBasicBlock(LLVMGetOperand(Src, 0));
- Dst = LLVMBuildBr(Builder, DeclareBB(SrcBB));
+ if (!LLVMIsConditional(Src)) {
+ LLVMValueRef SrcOp = LLVMGetOperand(Src, 0);
+ LLVMBasicBlockRef SrcBB = LLVMValueAsBasicBlock(SrcOp);
+ Dst = LLVMBuildBr(Builder, DeclareBB(SrcBB));
+ break;
+ }
+
+ LLVMValueRef Cond = LLVMGetCondition(Src);
+ LLVMValueRef Else = LLVMGetOperand(Src, 1);
+ LLVMBasicBlockRef ElseBB = DeclareBB(LLVMValueAsBasicBlock(Else));
+ LLVMValueRef Then = LLVMGetOperand(Src, 2);
+ LLVMBasicBlockRef ThenBB = DeclareBB(LLVMValueAsBasicBlock(Then));
+ Dst = LLVMBuildCondBr(Builder, Cond, ThenBB, ElseBB);
break;
}
case LLVMSwitch:
@@ -311,6 +322,13 @@
Dst = LLVMBuildAlloca(Builder, Ty, Name);
break;
}
+ case LLVMICmp: {
+ LLVMIntPredicate Pred = LLVMGetICmpPredicate(Src);
+ LLVMValueRef LHS = CloneValue(LLVMGetOperand(Src, 0), Builder);
+ LLVMValueRef RHS = CloneValue(LLVMGetOperand(Src, 1), Builder);
+ Dst = LLVMBuildICmp(Builder, Pred, LHS, RHS, Name);
+ break;
+ }
case LLVMCall: {
int ArgCount = LLVMGetNumOperands(Src) - 1;
SmallVector<LLVMValueRef, 8> Args;
Index: test/Bindings/llvm-c/echo.ll
===================================================================
--- test/Bindings/llvm-c/echo.ll
+++ test/Bindings/llvm-c/echo.ll
@@ -43,10 +43,40 @@
ret i32 %1
}
-define i32 @bborder(i32 %a, i32 %b) {
+define i32 @cond(i32 %a, i32 %b) {
br label %br
unreachable:
unreachable
br:
- br label %unreachable
+ %1 = icmp eq i32 %a, %b
+ br i1 %1, label %next0, label %unreachable
+next0:
+ %2 = icmp ne i32 %a, %b
+ br i1 %2, label %next1, label %unreachable
+next1:
+ %3 = icmp ugt i32 %a, %b
+ br i1 %3, label %next2, label %unreachable
+next2:
+ %4 = icmp uge i32 %a, %b
+ br i1 %4, label %next3, label %unreachable
+next3:
+ %5 = icmp ult i32 %a, %b
+ br i1 %5, label %next4, label %unreachable
+next4:
+ %6 = icmp ule i32 %a, %b
+ br i1 %6, label %next5, label %unreachable
+next5:
+ %7 = icmp sgt i32 %a, %b
+ br i1 %7, label %next6, label %unreachable
+next6:
+ %8 = icmp sge i32 %a, %b
+ br i1 %8, label %next7, label %unreachable
+next7:
+ %9 = icmp slt i32 %a, %b
+ br i1 %9, label %next8, label %unreachable
+next8:
+ %10 = icmp sle i32 %a, %b
+ br i1 %10, label %next9, label %unreachable
+next9:
+ ret i32 0
}
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