[PATCH] D16925: [mips] Support LA expandsion in PIC mode

[Srdjan Obucina via llvm-commits]

obucina created this revision.
obucina added reviewers: dsanders, zoran.jovanovic.
obucina added a subscriber: llvm-commits.
Herald added a reviewer: vkalintiris.
Herald added a subscriber: dsanders.

Adds support for LA expandsion in PIC mode

http://reviews.llvm.org/D16925

Files:
  lib/Target/Mips/AsmParser/MipsAsmParser.cpp
  test/MC/Mips/la.pic.s

Index: test/MC/Mips/la.pic.s
===================================================================
--- test/MC/Mips/la.pic.s
+++ test/MC/Mips/la.pic.s
@@ -0,0 +1,12 @@
+# RUN: llvm-mc  %s -triple=mipsel-unknown-linux -mcpu=mips32 -show-encoding | FileCheck %s
+# RUN: llvm-mc  %s -triple=mipsel-unknown-linux -mcpu=mips32 -show-encoding -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC
+
+la $4, foo
+
+# CHECK:        lui     $4, %hi(foo)        # encoding: [A,A,0x04,0x3c]
+# CHECK:                                    #    fixup A - offset: 0, value: %hi(foo), kind: fixup_Mips_HI16
+# CHECK:        addiu   $4, $4, %lo(foo)    # encoding: [A,A,0x84,0x24]
+# CHECK:                                    #   fixup A - offset: 0, value: %lo(foo), kind: fixup_Mips_LO16
+
+# CHECK-PIC:    lw      $4, %got(foo)($gp)  # encoding: [A,A,0x84,0x8f]
+# CHECK-PIC:                                #   fixup A - offset: 0, value: foo at GOT, kind: fixup_Mips_GOT_Local
Index: lib/Target/Mips/AsmParser/MipsAsmParser.cpp
===================================================================
--- lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -2465,9 +2465,16 @@
     TmpReg = ATReg;
   }
 
-  emitRX(Mips::LUi, TmpReg, MCOperand::createExpr(HiExpr), IDLoc, Instructions);
-  emitRRX(Mips::ADDiu, TmpReg, TmpReg, MCOperand::createExpr(LoExpr), IDLoc,
-          Instructions);
+  if (inPicMode()) {
+    const MCExpr *Got16RelocExpr = evaluateRelocExpr(SymExpr, "got");
+    emitRRX(Mips::LW, Mips::A0, Mips::GP, MCOperand::createExpr(Got16RelocExpr),
+            IDLoc, Instructions);
+  } else {
+    emitRX(Mips::LUi, TmpReg, MCOperand::createExpr(HiExpr), IDLoc,
+           Instructions);
+    emitRRX(Mips::ADDiu, TmpReg, TmpReg, MCOperand::createExpr(LoExpr), IDLoc,
+            Instructions);
+  }
 
   if (UseSrcReg)
     emitRRR(Mips::ADDu, DstReg, TmpReg, SrcReg, IDLoc, Instructions);


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