[PATCH] D16907: [X86] Don't zero/sign-extend i1 or i8 return values to 32 bits (PR22532)

[Hans Wennborg via llvm-commits]

hans created this revision.
hans added reviewers: majnemer, rjmccall, rsmith, jyknight.
hans added a subscriber: llvm-commits.

This brings us in line with GCC and MSVC behaviour, and saves on code size.

We were already not extending i1 return values to on x86_64 after [0].

The ABI docs are unclear about this situation. The new i386 psABI [1] clearly states (Table 2.4, page 14) that i1, i8, and i16 return values do not need to be extended beyond 8 bits (GCC and MSVC do extend 16-bit values though, so I'm holding off on that). The old i386 psABI [2] does not mention this. I can't find mention of this in the x86_64 ABI [3], but there is a proposal on [4] that matches the behaviour in this patch.

Please let me know what you think.

 [0]. http://llvm.org/viewvc/llvm-project?view=revision&revision=127766
 [1]. https://01.org/sites/default/files/file_attach/intel386-psabi-1.0.pdf
 [2]. https://refspecs.linuxfoundation.org/elf/abi386-4.pdf
 [3]. https://refspecs.linuxfoundation.org/elf/x86_64-abi-0.98.pdf
 [4]. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46942#c4

http://reviews.llvm.org/D16907

Files:
  docs/LangRef.rst
  include/llvm/Target/TargetLowering.h
  lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86ISelLowering.h
  test/CodeGen/X86/2007-08-10-SignExtSubreg.ll
  test/CodeGen/X86/bool-zext.ll
  test/CodeGen/X86/divrem8_ext.ll
  test/CodeGen/X86/float-conv-elim.ll
  test/CodeGen/X86/h-registers-3.ll
  test/CodeGen/X86/return-ext.ll
  test/CodeGen/X86/select.ll
  test/CodeGen/X86/sext-ret-val.ll
  test/CodeGen/X86/sext-trunc.ll
  test/CodeGen/X86/tail-call-attrs.ll
  test/CodeGen/X86/trunc-to-bool.ll
  test/CodeGen/X86/umul-with-overflow.ll

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