[PATCH: ScheduleDAGInstrs] handling of memory accesses with same address Value, but different offsets

[Jonas Paulsson via llvm-commits]

Hi,

I have implemented TII::areMemAccessesTriviallyDisjoint() for SystemZ,
in the attached patch.

This implementation uses MachineMemOperands for the analysis,
as opposed to looking at registers. This could therefore help other
targets as well, and perhaps be a useful default implementation of
this method.

It is somewhat odd that AA does not manage to return noAlias since it
should be an obvious case. Looks like isValueEqualInPotentialCycles()
sees that it is the same Value, but does not care about the sizes /
offsets. Perhaps then it is AA who should be extended to handle this
case?

Testcase: test/CodeGen/SystemZ/alias-01.ll.

/Jonas Paulsson

patch:

diff --git a/lib/Target/SystemZ/SystemZInstrInfo.cpp 
b/lib/Target/SystemZ/SystemZInstrInfo.cpp
index f2c1740..35e6dd0 100644
--- a/lib/Target/SystemZ/SystemZInstrInfo.cpp
+++ b/lib/Target/SystemZ/SystemZInstrInfo.cpp
@@ -1314,3 +1314,34 @@ void 
SystemZInstrInfo::loadImmediate(MachineBasicBlock &MBB,
    }
    BuildMI(MBB, MBBI, DL, get(Opcode), Reg).addImm(Value);
  }
+
+bool SystemZInstrInfo::
+areMemAccessesTriviallyDisjoint(MachineInstr *MIa, MachineInstr *MIb,
+                                AliasAnalysis *AA) const {
+
+  if (!MIa->hasOneMemOperand() || !MIb->hasOneMemOperand())
+    return false;
+
+  // If mem-operands show that the same address Value is used by both
+  // instructions, check for non-overlapping offsets and widths. Not
+  // sure if a register based analysis would be an improvement...
+
+  MachineMemOperand *MMOa = *MIa->memoperands_begin();
+  MachineMemOperand *MMOb = *MIb->memoperands_begin();
+  const Value *VALa = MMOa->getValue();
+  const Value *VALb = MMOb->getValue();
+  bool SameVal = (VALa && VALb && (VALa == VALb));
+  if (SameVal) {
+    int OffsetA = MMOa->getOffset(), OffsetB = MMOb->getOffset();
+    int WidthA = MMOa->getSize(), WidthB = MMOb->getSize();
+    int LowOffset = OffsetA < OffsetB ? OffsetA : OffsetB;
+    int HighOffset = OffsetA < OffsetB ? OffsetB : OffsetA;
+    int LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB;
+    if (LowOffset + LowWidth <= HighOffset)
+      return true;
+  }
+
+  return false;
+}
+
+
diff --git a/lib/Target/SystemZ/SystemZInstrInfo.h 
b/lib/Target/SystemZ/SystemZInstrInfo.h
index b272b10..24e2a08 100644
--- a/lib/Target/SystemZ/SystemZInstrInfo.h
+++ b/lib/Target/SystemZ/SystemZInstrInfo.h
@@ -249,6 +249,14 @@ public:
    void loadImmediate(MachineBasicBlock &MBB,
                       MachineBasicBlock::iterator MBBI,
                       unsigned Reg, uint64_t Value) const;
+
+  // Sometimes, it is possible for the target to tell, even without
+  // aliasing information, that two MIs access different memory
+  // addresses. This function returns true if two MIs access different
+  // memory addresses and false otherwise.
+  bool
+  areMemAccessesTriviallyDisjoint(MachineInstr *MIa, MachineInstr *MIb,
+                                  AliasAnalysis *AA = nullptr) const 
override;
  };
  } // end namespace llvm

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