[PATCH] D16768: [X86][AVX] Add support for 64-bit VZEXT_LOAD of 256-bit vectors to EltsFromConsecutiveLoads

[Simon Pilgrim via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL259635: [X86][AVX] Add support for 64-bit VZEXT_LOAD of 256/512-bit vectors to… (authored by RKSimon).

Changed prior to commit:
  http://reviews.llvm.org/D16768?vs=46630&id=46756#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D16768

Files:
  llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
  llvm/trunk/lib/Target/X86/X86InstrAVX512.td
  llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td
  llvm/trunk/lib/Target/X86/X86InstrSSE.td
  llvm/trunk/test/CodeGen/X86/merge-consecutive-loads-256.ll
  llvm/trunk/test/CodeGen/X86/merge-consecutive-loads-512.ll

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