[llvm] r259456 - [X86] Fix a bug in getMemOpBaseRegImmOfs

Sanjoy Das via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 1 18:32:43 PST 2016


Author: sanjoy
Date: Mon Feb  1 20:32:43 2016
New Revision: 259456

URL: http://llvm.org/viewvc/llvm-project?rev=259456&view=rev
Log:
[X86] Fix a bug in getMemOpBaseRegImmOfs

Fix a crash in `getMemOpBaseRegImmOfs` that happens if the base of
`MemOp` is a frame index memory operand.  The fix is to have
`getMemOpBaseRegImmOfs` bail out in such cases.  We can possibly be more
clever here, if needed.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
    llvm/trunk/test/CodeGen/X86/machine-sink-and-implicit-null-checks.ll

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=259456&r1=259455&r2=259456&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Mon Feb  1 20:32:43 2016
@@ -4604,7 +4604,11 @@ bool X86InstrInfo::getMemOpBaseRegImmOfs
 
   MemRefBegin += X86II::getOperandBias(Desc);
 
-  BaseReg = MemOp->getOperand(MemRefBegin + X86::AddrBaseReg).getReg();
+  MachineOperand &BaseMO = MemOp->getOperand(MemRefBegin + X86::AddrBaseReg);
+  if (!BaseMO.isReg()) // Can be an MO_FrameIndex
+    return false;
+
+  BaseReg = BaseMO.getReg();
   if (MemOp->getOperand(MemRefBegin + X86::AddrScaleAmt).getImm() != 1)
     return false;
 

Modified: llvm/trunk/test/CodeGen/X86/machine-sink-and-implicit-null-checks.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/machine-sink-and-implicit-null-checks.ll?rev=259456&r1=259455&r2=259456&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/machine-sink-and-implicit-null-checks.ll (original)
+++ llvm/trunk/test/CodeGen/X86/machine-sink-and-implicit-null-checks.ll Mon Feb  1 20:32:43 2016
@@ -27,13 +27,47 @@ define i1 @f(i8* %p0, i8* %p1) {
   unreachable
 }
 
+declare void @foo()
+
+declare token @llvm.experimental.gc.statepoint.p0f_isVoidf(i64, i32, void ()*, i32, i32, ...)
+declare i8 addrspace(1)* @llvm.experimental.gc.relocate.p1i8(token, i32, i32) nounwind readonly
+
+; Check for a crash.  The crash is not specific to statepoints, but
+; gc.statpeoint is an easy way to generate a fill instruction in
+; %continue0 (which causes the llc crash).
+define i1 @g(i8 addrspace(1)* %p0, i8* %p1) gc "statepoint-example" {
+ entry:
+  %c0 = icmp eq i8 addrspace(1)* %p0, null
+  %tok = call token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* @foo, i32 0, i32 0, i32 0, i32 0, i8 addrspace(1)* %p0)
+  %p0.relocated = call coldcc i8 addrspace(1)* @llvm.experimental.gc.relocate.p1i8(token %tok, i32 7, i32 7) ; (%p0, %p0)
+  br i1 %c0, label %throw0, label %continue0, !make.implicit !0
+
+ continue0:
+  %c1 = icmp eq i8* %p1, null
+  br i1 %c1, label %throw1, label %continue1, !make.implicit !0
+
+ continue1:
+  %v0 = load i8, i8 addrspace(1)* %p0.relocated
+  %v1 = load i8, i8* %p1
+  %v = icmp eq i8 %v0, %v1
+  ret i1 %v
+
+ throw0:
+  call void @throw0()
+  unreachable
+
+ throw1:
+  call void @throw1()
+  unreachable
+}
+
 ; Check that we have two implicit null checks in @f
 
 ; CHECK: __LLVM_FaultMaps:
 ; CHECK-NEXT:        .byte   1
 ; CHECK-NEXT:        .byte   0
 ; CHECK-NEXT:        .short  0
-; CHECK-NEXT:        .long   1
+; CHECK-NEXT:        .long   2
 
 ; FunctionInfo[0] =
 




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