[llvm] r259449 - [X86][FastISel] Don't force Nearest-Even rounding for VCVTPS2PH, use MXCSR.
Ahmed Bougacha via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 1 17:44:04 PST 2016
Author: ab
Date: Mon Feb 1 19:44:03 2016
New Revision: 259449
URL: http://llvm.org/viewvc/llvm-project?rev=259449&view=rev
Log:
[X86][FastISel] Don't force Nearest-Even rounding for VCVTPS2PH, use MXCSR.
FastISel counterpart to r259448.
Modified:
llvm/trunk/lib/Target/X86/X86FastISel.cpp
llvm/trunk/test/CodeGen/X86/fast-isel-float-half-convertion.ll
Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=259449&r1=259448&r2=259449&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Mon Feb 1 19:44:03 2016
@@ -2294,8 +2294,10 @@ bool X86FastISel::fastLowerIntrinsicCall
// register class VR128 by method 'constrainOperandRegClass' which is
// directly called by 'fastEmitInst_ri'.
// Instruction VCVTPS2PHrr takes an extra immediate operand which is
- // used to provide rounding control.
- InputReg = fastEmitInst_ri(X86::VCVTPS2PHrr, RC, InputReg, false, 0);
+ // used to provide rounding control: use MXCSR.RC, encoded as 0b100.
+ // It's consistent with the other FP instructions, which are usually
+ // controlled by MXCSR.
+ InputReg = fastEmitInst_ri(X86::VCVTPS2PHrr, RC, InputReg, false, 4);
// Move the lower 32-bits of ResultReg to another register of class GR32.
ResultReg = createResultReg(&X86::GR32RegClass);
Modified: llvm/trunk/test/CodeGen/X86/fast-isel-float-half-convertion.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-float-half-convertion.ll?rev=259449&r1=259448&r2=259449&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-float-half-convertion.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-float-half-convertion.ll Mon Feb 1 19:44:03 2016
@@ -4,7 +4,7 @@
define i16 @test_fp32_to_fp16(float %a) {
; CHECK-LABEL: test_fp32_to_fp16:
-; CHECK: vcvtps2ph $0, %xmm0, %xmm0
+; CHECK: vcvtps2ph $4, %xmm0, %xmm0
; CHECK-NEXT: vmovd %xmm0, %eax
; CHECK-NEXT: retq
entry:
More information about the llvm-commits
mailing list