[llvm] r259420 - [X86][AVX512] Add support for AVX512 VINSERTPS shuffle decoding
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 1 14:05:51 PST 2016
Author: rksimon
Date: Mon Feb 1 16:05:50 2016
New Revision: 259420
URL: http://llvm.org/viewvc/llvm-project?rev=259420&view=rev
Log:
[X86][AVX512] Add support for AVX512 VINSERTPS shuffle decoding
Modified:
llvm/trunk/lib/Target/X86/InstPrinter/X86InstComments.cpp
llvm/trunk/test/CodeGen/X86/merge-consecutive-loads-128.ll
llvm/trunk/test/CodeGen/X86/merge-consecutive-loads-256.ll
Modified: llvm/trunk/lib/Target/X86/InstPrinter/X86InstComments.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/InstPrinter/X86InstComments.cpp?rev=259420&r1=259419&r2=259420&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/InstPrinter/X86InstComments.cpp (original)
+++ llvm/trunk/lib/Target/X86/InstPrinter/X86InstComments.cpp Mon Feb 1 16:05:50 2016
@@ -278,10 +278,12 @@ bool llvm::EmitAnyX86InstComments(const
case X86::INSERTPSrr:
case X86::VINSERTPSrr:
+ case X86::VINSERTPSzrr:
Src2Name = getRegName(MI->getOperand(2).getReg());
// FALL THROUGH.
case X86::INSERTPSrm:
case X86::VINSERTPSrm:
+ case X86::VINSERTPSzrm:
DestName = getRegName(MI->getOperand(0).getReg());
Src1Name = getRegName(MI->getOperand(1).getReg());
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
Modified: llvm/trunk/test/CodeGen/X86/merge-consecutive-loads-128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/merge-consecutive-loads-128.ll?rev=259420&r1=259419&r2=259420&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/merge-consecutive-loads-128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/merge-consecutive-loads-128.ll Mon Feb 1 16:05:50 2016
@@ -188,23 +188,11 @@ define <4 x float> @merge_4f32_f32_012u(
; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
; SSE41-NEXT: retq
;
-; AVX1-LABEL: merge_4f32_f32_012u:
-; AVX1: # BB#0:
-; AVX1-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
-; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
-; AVX1-NEXT: retq
-;
-; AVX2-LABEL: merge_4f32_f32_012u:
-; AVX2: # BB#0:
-; AVX2-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
-; AVX2-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
-; AVX2-NEXT: retq
-;
-; AVX512F-LABEL: merge_4f32_f32_012u:
-; AVX512F: # BB#0:
-; AVX512F-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
-; AVX512F-NEXT: vinsertps $32, 8(%rdi), %xmm0, %xmm0
-; AVX512F-NEXT: retq
+; AVX-LABEL: merge_4f32_f32_012u:
+; AVX: # BB#0:
+; AVX-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
+; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
+; AVX-NEXT: retq
%ptr0 = getelementptr inbounds float, float* %ptr, i64 0
%ptr1 = getelementptr inbounds float, float* %ptr, i64 1
%ptr2 = getelementptr inbounds float, float* %ptr, i64 2
@@ -234,23 +222,11 @@ define <4 x float> @merge_4f32_f32_019u(
; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
; SSE41-NEXT: retq
;
-; AVX1-LABEL: merge_4f32_f32_019u:
-; AVX1: # BB#0:
-; AVX1-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
-; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
-; AVX1-NEXT: retq
-;
-; AVX2-LABEL: merge_4f32_f32_019u:
-; AVX2: # BB#0:
-; AVX2-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
-; AVX2-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
-; AVX2-NEXT: retq
-;
-; AVX512F-LABEL: merge_4f32_f32_019u:
-; AVX512F: # BB#0:
-; AVX512F-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
-; AVX512F-NEXT: vinsertps $32, 36(%rdi), %xmm0, %xmm0
-; AVX512F-NEXT: retq
+; AVX-LABEL: merge_4f32_f32_019u:
+; AVX: # BB#0:
+; AVX-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
+; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
+; AVX-NEXT: retq
%ptr0 = getelementptr inbounds float, float* %ptr, i64 0
%ptr1 = getelementptr inbounds float, float* %ptr, i64 1
%ptr2 = getelementptr inbounds float, float* %ptr, i64 9
Modified: llvm/trunk/test/CodeGen/X86/merge-consecutive-loads-256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/merge-consecutive-loads-256.ll?rev=259420&r1=259419&r2=259420&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/merge-consecutive-loads-256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/merge-consecutive-loads-256.ll Mon Feb 1 16:05:50 2016
@@ -319,7 +319,7 @@ define <8 x float> @merge_8f32_f32_1u3u5
; AVX512F-NEXT: vmovss 20(%rdi), %xmm1
; AVX512F-NEXT: vshufps {{.*#+}} xmm0 = xmm1[0,1],xmm0[1,0]
; AVX512F-NEXT: vmovss 4(%rdi), %xmm1
-; AVX512F-NEXT: vinsertps $32, 12(%rdi), %xmm1, %xmm1
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],mem[0],xmm1[3]
; AVX512F-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
; AVX512F-NEXT: retq
%ptr0 = getelementptr inbounds float, float* %ptr, i64 1
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