[llvm] r259088 - AMDGPU: Set DX10Clamp bit
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 28 12:53:36 PST 2016
Author: arsenm
Date: Thu Jan 28 14:53:35 2016
New Revision: 259088
URL: http://llvm.org/viewvc/llvm-project?rev=259088&view=rev
Log:
AMDGPU: Set DX10Clamp bit
Added:
llvm/trunk/test/CodeGen/AMDGPU/hsa-fp-mode.ll
Modified:
llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp?rev=259088&r1=259087&r2=259088&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp Thu Jan 28 14:53:35 2016
@@ -476,11 +476,10 @@ void AMDGPUAsmPrinter::getSIProgramInfo(
// register.
ProgInfo.FloatMode = getFPMode(MF);
- // XXX: Not quite sure what this does, but sc seems to unset this.
ProgInfo.IEEEMode = 0;
- // Do not clamp NAN to 0.
- ProgInfo.DX10Clamp = 0;
+ // Make clamp modifier on NaN input returns 0.
+ ProgInfo.DX10Clamp = 1;
const MachineFrameInfo *FrameInfo = MF.getFrameInfo();
ProgInfo.ScratchSize = FrameInfo->estimateStackSize(MF);
Added: llvm/trunk/test/CodeGen/AMDGPU/hsa-fp-mode.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/hsa-fp-mode.ll?rev=259088&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/hsa-fp-mode.ll (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/hsa-fp-mode.ll Thu Jan 28 14:53:35 2016
@@ -0,0 +1,10 @@
+; RUN: llc -march=amdgcn -mcpu=kaveri -mtriple=amdgcn-unknown-amdhsa -mattr=-fp32-denormals,+fp64-denormals < %s | FileCheck -check-prefix=FP64-DENORMAL -check-prefix=COMMON %s
+
+; COMMON-LABEL: {{^}}test_kernel:
+; COMMON-DENORMAL: compute_pgm_rsrc1_float_mode = compute_pgm_rsrc1_float_mode = 192
+; COMMON-DENORMAL: compute_pgm_rsrc1_dx10_clamp = 1
+define void @test_kernel(float addrspace(1)* %out0, double addrspace(1)* %out1) nounwind {
+ store float 0.0, float addrspace(1)* %out0
+ store double 0.0, double addrspace(1)* %out1
+ ret void
+}
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