[llvm] r258872 - [WebAssembly] Omit no-op adds for non-mem uses of FrameIndex

[Derek Schuff via llvm-commits]

Author: dschuff
Date: Tue Jan 26 16:47:43 2016
New Revision: 258872

URL: http://llvm.org/viewvc/llvm-project?rev=258872&view=rev
Log:
[WebAssembly] Omit no-op adds for non-mem uses of FrameIndex

Differential Revision: http://reviews.llvm.org/D16554

Modified:
    llvm/trunk/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
    llvm/trunk/lib/Target/WebAssembly/WebAssemblyPeephole.cpp
    llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
    llvm/trunk/test/CodeGen/WebAssembly/mem-intrinsics.ll
    llvm/trunk/test/CodeGen/WebAssembly/userstack.ll

Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp?rev=258872&r1=258871&r2=258872&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp Tue Jan 26 16:47:43 2016
@@ -160,6 +160,7 @@ void WebAssemblyFrameLowering::emitEpilo
   BuildMI(MBB, InsertPt, DL, TII->get(WebAssembly::CONST_I32), OffsetReg)
       .addImm(StackSize);
   auto *SPSymbol = MF.createExternalSymbolName("__stack_pointer");
+  // TODO: Fold this add into the const offset field of the store.
   BuildMI(MBB, InsertPt, DL, TII->get(WebAssembly::ADD_I32), WebAssembly::SP32)
       .addReg(WebAssembly::SP32)
       .addReg(OffsetReg);

Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyPeephole.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyPeephole.cpp?rev=258872&r1=258871&r2=258872&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyPeephole.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyPeephole.cpp Tue Jan 26 16:47:43 2016
@@ -120,7 +120,10 @@ bool WebAssemblyPeephole::runOnMachineFu
               MachineOperand &MO = MI.getOperand(0);
               unsigned OldReg = MO.getReg();
               unsigned NewReg = Op2.getReg();
-              if (MRI.getRegClass(NewReg) != MRI.getRegClass(OldReg))
+
+              // TODO: Handle SP/physregs in MaybeRewriteToDiscard
+              if (TargetRegisterInfo::isVirtualRegister(NewReg) &&
+                  (MRI.getRegClass(NewReg) != MRI.getRegClass(OldReg)))
                 report_fatal_error("Peephole: call to builtin function with "
                                    "wrong signature, from/to mismatch");
               Changed |= MaybeRewriteToDiscard(OldReg, NewReg, MO, MFI, MRI);

Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp?rev=258872&r1=258871&r2=258872&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp Tue Jan 26 16:47:43 2016
@@ -81,15 +81,18 @@ void WebAssemblyRegisterInfo::eliminateF
     auto &MRI = MF.getRegInfo();
     const auto *TII = MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
 
-    unsigned OffsetReg = MRI.createVirtualRegister(&WebAssembly::I32RegClass);
-    BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(WebAssembly::CONST_I32),
-            OffsetReg)
-        .addImm(FrameOffset);
-    BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(WebAssembly::ADD_I32),
-            OffsetReg)
-        .addReg(WebAssembly::SP32)
-        .addReg(OffsetReg);
-    MI.getOperand(FIOperandNum).ChangeToRegister(OffsetReg, /*IsDef=*/false);
+    unsigned FIRegOperand = WebAssembly::SP32;
+    if (FrameOffset) {
+      FIRegOperand = MRI.createVirtualRegister(&WebAssembly::I32RegClass);
+      BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(WebAssembly::CONST_I32),
+              FIRegOperand)
+          .addImm(FrameOffset);
+      BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(WebAssembly::ADD_I32),
+              FIRegOperand)
+          .addReg(WebAssembly::SP32)
+          .addReg(FIRegOperand);
+    }
+    MI.getOperand(FIOperandNum).ChangeToRegister(FIRegOperand, /*IsDef=*/false);
   }
 }
 

Modified: llvm/trunk/test/CodeGen/WebAssembly/mem-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/mem-intrinsics.ll?rev=258872&r1=258871&r2=258872&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/mem-intrinsics.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/mem-intrinsics.ll Tue Jan 26 16:47:43 2016
@@ -59,13 +59,18 @@ define void @set_no(i8* %dst, i8 %src, i
   ret void
 }
 
+
 ; CHECK-LABEL: frame_index:
 ; CHECK: i32.call $discard=, memset at FUNCTION, $3, $pop1, $pop0{{$}}
+; CHECK: i32.call $discard=, memset at FUNCTION, $4, $pop3, $pop2{{$}}
 ; CHECK: return{{$}}
 define void @frame_index() {
 entry:
   %a = alloca [2048 x i8], align 16
+  %b = alloca [2048 x i8], align 16
   %0 = getelementptr inbounds [2048 x i8], [2048 x i8]* %a, i32 0, i32 0
+  %1 = getelementptr inbounds [2048 x i8], [2048 x i8]* %b, i32 0, i32 0
   call void @llvm.memset.p0i8.i32(i8* %0, i8 256, i32 1024, i32 16, i1 false)
+  call void @llvm.memset.p0i8.i32(i8* %1, i8 256, i32 1024, i32 16, i1 false)
   ret void
 }

Modified: llvm/trunk/test/CodeGen/WebAssembly/userstack.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/userstack.ll?rev=258872&r1=258871&r2=258872&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/userstack.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/userstack.ll Tue Jan 26 16:47:43 2016
@@ -76,6 +76,24 @@ define void @allocarray() {
  ret void
 }
 
+declare void @ext_func(i64* %ptr)
+; CHECK-LABEL: non_mem_use
+define void @non_mem_use() {
+ ; CHECK: i32.const [[L2:.+]]=, 16
+ ; CHECK-NEXT: i32.sub [[SP:.+]]=, {{.+}}, [[L2]]
+ %r = alloca i64
+ %r2 = alloca i64
+ ; %r is at SP+8
+ ; CHECK: i32.const [[OFF:.+]]=, 8
+ ; CHECK-NEXT: i32.add [[ARG1:.+]]=, [[SP]], [[OFF]]
+ ; CHECK-NEXT: call ext_func at FUNCTION, [[ARG1]]
+ call void @ext_func(i64* %r)
+ ; %r2 is at SP+0, no add needed
+ ; CHECK-NEXT: call ext_func at FUNCTION, [[SP]]
+ call void @ext_func(i64* %r2)
+ ret void
+}
+
 ; CHECK-LABEL: allocarray_inbounds:
 ; CHECK: .local i32, i32, i32, i32{{$}}
 define void @allocarray_inbounds() {