[polly] r258662 - test: Name instructions in a test case [NFC]

[Michael Kruse via llvm-commits]

A suggestion: When explicitly choosing a name for a register, could we
take one that does not end with a number? Numbers are already appended
by LLVM itself to disambiguate names, so with such names one cannot
see whether this name was chosen manually or automatically. In case it
is automatic, we might need to add regex expressions {{[0-9]*}} in
test cases, but not for manual ones. When LLVM disambiguates it again,
it adds yet another number, e.g. "tmp30" s.t. one might think on first
sight that there were 30 registers with name "tmp" before
disambiguation.
Single letters (a,b,c) would already do it.

Michael


2016-01-24 18:51 GMT+01:00 Tobias Grosser via llvm-commits
<llvm-commits at lists.llvm.org>:
> Author: grosser
> Date: Sun Jan 24 11:51:37 2016
> New Revision: 258662
>
> URL: http://llvm.org/viewvc/llvm-project?rev=258662&view=rev
> Log:
> test: Name instructions in a test case [NFC]
>
> Modified:
>     polly/trunk/test/Isl/CodeGen/invariant_load_scalar_escape_alloca_sharing.ll
>
> Modified: polly/trunk/test/Isl/CodeGen/invariant_load_scalar_escape_alloca_sharing.ll
> URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/invariant_load_scalar_escape_alloca_sharing.ll?rev=258662&r1=258661&r2=258662&view=diff
> ==============================================================================
> --- polly/trunk/test/Isl/CodeGen/invariant_load_scalar_escape_alloca_sharing.ll (original)
> +++ polly/trunk/test/Isl/CodeGen/invariant_load_scalar_escape_alloca_sharing.ll Sun Jan 24 11:51:37 2016
> @@ -7,15 +7,15 @@
>  ; CHECK-NOT: alloca
>  ; CHECK:     %dec3.in.phiops = alloca i32
>  ; CHECK-NOT: alloca
> -; CHECK:     %.preload.s2a = alloca i32
> +; CHECK:     %tmp0.preload.s2a = alloca i32
>  ; CHECK-NOT: alloca
>  ;
>  ; CHECK:       %ncol.load = load i32, i32* @ncol
> -; CHECK-NEXT:  store i32 %ncol.load, i32* %.preload.s2a
> +; CHECK-NEXT:  store i32 %ncol.load, i32* %tmp0.preload.s2a
>  ;
>  ; CHECK:      polly.stmt.while.body.lr.ph:
> -; CHECK-NEXT:   %.preload.s2a.reload = load i32, i32* %.preload.s2a
> -; CHECK-NEXT:   store i32 %.preload.s2a.reload, i32* %dec3.in.phiops
> +; CHECK-NEXT:   %tmp0.preload.s2a.reload = load i32, i32* %tmp0.preload.s2a
> +; CHECK-NEXT:   store i32 %tmp0.preload.s2a.reload, i32* %dec3.in.phiops
>  ;
>  target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
>
> @@ -26,32 +26,32 @@ entry:
>    br label %entry.split
>
>  entry.split:                                      ; preds = %entry
> -  %0 = load i32, i32* @ncol, align 4
> -  %tobool.2 = icmp eq i32 %0, 0
> +  %tmp0 = load i32, i32* @ncol, align 4
> +  %tobool.2 = icmp eq i32 %tmp0, 0
>    br i1 %tobool.2, label %while.end, label %while.body.lr.ph
>
>  while.body.lr.ph:                                 ; preds = %entry.split
>    br label %while.body
>
>  while.body:                                       ; preds = %while.body.lr.ph, %while.cond.backedge
> -  %dec3.in = phi i32 [ %0, %while.body.lr.ph ], [ %dec3, %while.cond.backedge ]
> +  %dec3.in = phi i32 [ %tmp0, %while.body.lr.ph ], [ %dec3, %while.cond.backedge ]
>    %dec3 = add nsw i32 %dec3.in, -1
>    %idxprom = sext i32 %dec3 to i64
>    %arrayidx = getelementptr inbounds i32, i32* %data1, i64 %idxprom
> -  %1 = load i32, i32* %arrayidx, align 4
> +  %tmp1 = load i32, i32* %arrayidx, align 4
>    %idxprom1 = sext i32 %dec3 to i64
>    %arrayidx2 = getelementptr inbounds i32, i32* %data2, i64 %idxprom1
> -  %2 = load i32, i32* %arrayidx2, align 4
> -  %cmp = icmp sgt i32 %1, %2
> +  %tmp2 = load i32, i32* %arrayidx2, align 4
> +  %cmp = icmp sgt i32 %tmp1, %tmp2
>    br i1 %cmp, label %if.then, label %while.cond.backedge
>
>  if.then:                                          ; preds = %while.body
>    %idxprom3 = sext i32 %dec3 to i64
>    %arrayidx4 = getelementptr inbounds i32, i32* %data2, i64 %idxprom3
> -  %3 = load i32, i32* %arrayidx4, align 4
> +  %tmp3 = load i32, i32* %arrayidx4, align 4
>    %idxprom5 = sext i32 %dec3 to i64
>    %arrayidx6 = getelementptr inbounds i32, i32* %data1, i64 %idxprom5
> -  store i32 %3, i32* %arrayidx6, align 4
> +  store i32 %tmp3, i32* %arrayidx6, align 4
>    br label %while.cond.backedge
>
>  while.cond.backedge:                              ; preds = %if.then, %while.body
>
>
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