[PATCH] D16491: AMDGPU: Implement read_register and write_register intrinsics

[Matt Arsenault via llvm-commits]

arsenm created this revision.
arsenm added a reviewer: tstellarAMD.
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Herald added a subscriber: arsenm.

Some of the special intrinsics now that now correspond to a instruction
also have special setting of some registers, e.g. llvm.SI.sendmsg sets
m0 as well as use s_sendmsg. Using these explicit register intrinsics
may be a better option.
    
Reading the exec mask and others may be useful for debugging. For this
I'm not sure this is entirely correct because we would want this to
be convergent, although it's possible this is already treated
sufficently conservatively.

http://reviews.llvm.org/D16491

Files:
  lib/Target/AMDGPU/SIISelLowering.cpp
  lib/Target/AMDGPU/SIISelLowering.h
  test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll
  test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll
  test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll
  test/CodeGen/AMDGPU/read_register.ll
  test/CodeGen/AMDGPU/write-register-vgpr-into-sgpr.ll
  test/CodeGen/AMDGPU/write_register.ll

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