[llvm] r258534 - [AArch64] Simplify emitConditionalCompare calls. NFC.
Ahmed Bougacha via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 22 11:43:57 PST 2016
Author: ab
Date: Fri Jan 22 13:43:57 2016
New Revision: 258534
URL: http://llvm.org/viewvc/llvm-project?rev=258534&view=rev
Log:
[AArch64] Simplify emitConditionalCompare calls. NFC.
Now that both callsites are identical, we can simplify the
prototype and make it easier to reason about the 2-CC case.
Modified:
llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=258534&r1=258533&r2=258534&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Fri Jan 22 13:43:57 2016
@@ -1287,7 +1287,8 @@ static SDValue emitComparison(SDValue LH
/// Create a conditional comparison; Use CCMP, CCMN or FCCMP as appropriate.
static SDValue emitConditionalComparison(SDValue LHS, SDValue RHS,
ISD::CondCode CC, SDValue CCOp,
- SDValue Condition, unsigned NZCV,
+ AArch64CC::CondCode Predicate,
+ AArch64CC::CondCode OutCC,
SDLoc DL, SelectionDAG &DAG) {
unsigned Opcode = 0;
if (LHS.getValueType().isFloatingPoint())
@@ -1303,6 +1304,9 @@ static SDValue emitConditionalComparison
if (Opcode == 0)
Opcode = AArch64ISD::CCMP;
+ SDValue Condition = DAG.getConstant(Predicate, DL, MVT_CC);
+ AArch64CC::CondCode InvOutCC = AArch64CC::getInvertedCondCode(OutCC);
+ unsigned NZCV = AArch64CC::getNZCVToSatisfyCondCode(InvOutCC);
SDValue NZCVOp = DAG.getConstant(NZCV, DL, MVT::i32);
return DAG.getNode(Opcode, DL, MVT_CC, LHS, RHS, NZCVOp, Condition, CCOp);
}
@@ -1380,14 +1384,9 @@ static SDValue emitConjunctionDisjunctio
SDValue ExtraCmp;
if (!CCOp.getNode())
ExtraCmp = emitComparison(LHS, RHS, CC, DL, DAG);
- else {
- SDValue ConditionOp = DAG.getConstant(Predicate, DL, MVT_CC);
- AArch64CC::CondCode InvExtraCC =
- AArch64CC::getInvertedCondCode(ExtraCC);
- unsigned NZCV = AArch64CC::getNZCVToSatisfyCondCode(InvExtraCC);
- ExtraCmp = emitConditionalComparison(LHS, RHS, CC, CCOp, ConditionOp,
- NZCV, DL, DAG);
- }
+ else
+ ExtraCmp = emitConditionalComparison(LHS, RHS, CC, CCOp, Predicate,
+ ExtraCC, DL, DAG);
CCOp = ExtraCmp;
Predicate = ExtraCC;
}
@@ -1397,10 +1396,7 @@ static SDValue emitConjunctionDisjunctio
if (!CCOp.getNode())
return emitComparison(LHS, RHS, CC, DL, DAG);
// Otherwise produce a ccmp.
- SDValue ConditionOp = DAG.getConstant(Predicate, DL, MVT_CC);
- AArch64CC::CondCode InvOutCC = AArch64CC::getInvertedCondCode(OutCC);
- unsigned NZCV = AArch64CC::getNZCVToSatisfyCondCode(InvOutCC);
- return emitConditionalComparison(LHS, RHS, CC, CCOp, ConditionOp, NZCV, DL,
+ return emitConditionalComparison(LHS, RHS, CC, CCOp, Predicate, OutCC, DL,
DAG);
} else if ((Opcode != ISD::AND && Opcode != ISD::OR) || !Val->hasOneUse())
return SDValue();
More information about the llvm-commits
mailing list