[PATCH] D11393: [X86] Allow X86::COND_NE_OR_P and X86::COND_NP_OR_E to be reversed.
Cong Hou via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 22 11:36:30 PST 2016
congh added inline comments.
================
Comment at: lib/Target/X86/X86InstrInfo.cpp:4028
@@ +4027,3 @@
+ auto NewTBB = I->getOperand(0).getMBB();
+ if (TBB == NewTBB) {
+ if ((OldBranchCode == X86::COND_NP && BranchCode == X86::COND_E) ||
----------------
I found that we could not add NewTBB != TBB here. I found such a test case, in which the target of JNE and JNP and the fall-through block are the same block.
```
# Machine code for function func: Post SSA
Frame Objects:
fi#-2: size=4, align=4, fixed, at location [SP+8]
fi#-1: size=4, align=16, fixed, at location [SP+4]
fi#0: size=4, align=4, at location [SP-4]
Constant Pool:
cp#0: -1.000000e+00, align=8
BB#0: derived from LLVM BB %entry
PUSH32r %EAX<undef>, %ESP<imp-def>, %ESP<imp-use>; flags: FrameSetup
%XMM1<def> = CVTSS2SDrm %ESP, 1, %noreg, 8, %noreg; mem:LD4[FixedStack-1](align=16)
%XMM0<def> = CVTSS2SDrm %ESP, 1, %noreg, 12, %noreg; mem:LD4[FixedStack-2]
%XMM0<def,tied1> = MULSDrr %XMM0<kill,tied0>, %XMM1<kill>
%XMM1<def> = FsFLD0SD
UCOMISDrr %XMM0, %XMM1<kill>, %EFLAGS<imp-def>
JNE_1 <BB#2>, %EFLAGS<imp-use>
JNP_1 <BB#2>, %EFLAGS<imp-use>
Successors according to CFG: BB#3(0x50000000 / 0x80000000 = 62.50%) BB#2(0x30000000 / 0x80000000 = 37.50%)
BB#2: derived from LLVM BB %bb1
Live Ins: %XMM0
Predecessors according to CFG: BB#0
%XMM0<def,tied1> = ADDSDrm %XMM0<kill,tied0>, %noreg, 1, %noreg, <cp#0>, %noreg; mem:LD8[ConstantPool]
Successors according to CFG: BB#3(?%)
BB#3: derived from LLVM BB %bb2
Live Ins: %XMM0
Predecessors according to CFG: BB#2 BB#0
%XMM0<def> = CVTSD2SSrr %XMM0<kill>
MOVSSmr %ESP, 1, %noreg, 0, %noreg, %XMM0<kill>; mem:ST4[FixedStack0]
LD_F32m %ESP, 1, %noreg, 0, %noreg, %FPSW<imp-def,dead>; mem:LD4[FixedStack0]
%EAX<def> = POP32r %ESP<imp-def>, %ESP<imp-use>; flags: FrameDestroy
RETL
# End machine code for function func.
```
http://reviews.llvm.org/D11393
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