[PATCH] D16451: AMDGPU: Remove random TGSI intrinsic
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 21 23:13:24 PST 2016
arsenm created this revision.
arsenm added a reviewer: tstellarAMD.
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Herald added a subscriber: arsenm.
I don't think this was ever used.
http://reviews.llvm.org/D16451
Files:
lib/Target/AMDGPU/AMDGPUIntrinsics.td
lib/Target/AMDGPU/EvergreenInstructions.td
lib/Target/AMDGPU/R600Instructions.td
Index: lib/Target/AMDGPU/R600Instructions.td
===================================================================
--- lib/Target/AMDGPU/R600Instructions.td
+++ lib/Target/AMDGPU/R600Instructions.td
@@ -1144,12 +1144,6 @@
def : RcpPat<recip_ieee, f32>;
}
-class TGSI_LIT_Z_Common <InstR600 mul_lit, InstR600 log_clamped, InstR600 exp_ieee>
- : Pat <
- (int_TGSI_lit_z f32:$src_x, f32:$src_y, f32:$src_w),
- (exp_ieee (mul_lit (log_clamped (MAX $src_y, (f32 ZERO))), $src_w, $src_x))
->;
-
//===----------------------------------------------------------------------===//
// R600 / R700 Instructions
//===----------------------------------------------------------------------===//
@@ -1188,7 +1182,6 @@
defm DIV_r600 : DIV_Common<RECIP_IEEE_r600>;
def : POW_Common <LOG_IEEE_r600, EXP_IEEE_r600, MUL>;
- def TGSI_LIT_Z_r600 : TGSI_LIT_Z_Common<MUL_LIT_r600, LOG_CLAMPED_r600, EXP_IEEE_r600>;
def : Pat<(fsqrt f32:$src), (MUL $src, (RECIPSQRT_CLAMPED_r600 $src))>;
def : RsqPat<RECIPSQRT_IEEE_r600, f32>;
Index: lib/Target/AMDGPU/EvergreenInstructions.td
===================================================================
--- lib/Target/AMDGPU/EvergreenInstructions.td
+++ lib/Target/AMDGPU/EvergreenInstructions.td
@@ -356,8 +356,6 @@
def MOVA_INT_eg : R600_1OP <0xCC, "MOVA_INT", [], VecALU>;
}
-def TGSI_LIT_Z_eg : TGSI_LIT_Z_Common<MUL_LIT_eg, LOG_CLAMPED_eg, EXP_IEEE_eg>;
-
def FLT_TO_INT_eg : FLT_TO_INT_Common<0x50> {
let Pattern = [];
let Itinerary = AnyALU;
Index: lib/Target/AMDGPU/AMDGPUIntrinsics.td
===================================================================
--- lib/Target/AMDGPU/AMDGPUIntrinsics.td
+++ lib/Target/AMDGPU/AMDGPUIntrinsics.td
@@ -57,9 +57,4 @@
def int_AMDIL_exp : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>;
}
-let TargetPrefix = "TGSI", isTarget = 1 in {
-
- def int_TGSI_lit_z : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty, llvm_float_ty],[IntrNoMem]>;
-}
-
include "SIIntrinsics.td"
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