[llvm] r258333 - [GlobalISel] Add a generic machine opcode for ADD.
Eric Christopher via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 20 16:12:55 PST 2016
On Wed, Jan 20, 2016 at 4:11 PM Quentin Colombet <qcolombet at apple.com>
wrote:
> Hi Eric,
>
> On Jan 20, 2016, at 3:13 PM, Eric Christopher <echristo at gmail.com> wrote:
>
> Hi Quentin,
>
> Just one other thing I noticed on my way through this - would it be
> possible to separate the new opcodes you're adding for global isel to
> another .td file that's then included? Keep the separation of concerns/code
> out?
>
>
> SGTM.
>
>
Hey awesome. Thanks! :)
-eric
> Cheers,
> -Quentin
>
>
> Thoughts?
>
> -eric
>
> On Wed, Jan 20, 2016 at 11:18 AM Quentin Colombet via llvm-commits <
> llvm-commits at lists.llvm.org> wrote:
>
>> Author: qcolombet
>> Date: Wed Jan 20 13:14:55 2016
>> New Revision: 258333
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=258333&view=rev
>> Log:
>> [GlobalISel] Add a generic machine opcode for ADD.
>> The selection process being split into separate passes, we need generic
>> opcodes
>> to translate the LLVM IR to target independent code.
>>
>> This patch adds an opcode for addition: G_ADD.
>>
>> Differential Revision: http://reviews.llvm.org/D15472
>>
>> Modified:
>> llvm/trunk/include/llvm/Target/Target.td
>> llvm/trunk/include/llvm/Target/TargetOpcodes.h
>> llvm/trunk/test/TableGen/trydecode-emission.td
>> llvm/trunk/test/TableGen/trydecode-emission2.td
>> llvm/trunk/test/TableGen/trydecode-emission3.td
>> llvm/trunk/utils/TableGen/CodeGenTarget.cpp
>>
>> Modified: llvm/trunk/include/llvm/Target/Target.td
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/Target.td?rev=258333&r1=258332&r2=258333&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/include/llvm/Target/Target.td (original)
>> +++ llvm/trunk/include/llvm/Target/Target.td Wed Jan 20 13:14:55 2016
>> @@ -913,6 +913,17 @@ def FAULTING_LOAD_OP : Instruction {
>> let usesCustomInserter = 1;
>> let mayLoad = 1;
>> }
>> +
>> +// Generic opcode used by the IRTranslator.
>> +// After ISel, this opcode should not appear.
>> +def G_ADD : Instruction {
>> + let OutOperandList = (outs unknown:$dst);
>> + let InOperandList = (ins unknown:$src1, unknown:$src2);
>> + let AsmString = "";
>> + let hasSideEffects = 0;
>> + let isCommutable = 1;
>> +}
>> +// TODO: Add the other generic opcodes.
>> }
>>
>>
>> //===----------------------------------------------------------------------===//
>>
>> Modified: llvm/trunk/include/llvm/Target/TargetOpcodes.h
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetOpcodes.h?rev=258333&r1=258332&r2=258333&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/include/llvm/Target/TargetOpcodes.h (original)
>> +++ llvm/trunk/include/llvm/Target/TargetOpcodes.h Wed Jan 20 13:14:55
>> 2016
>> @@ -129,9 +129,27 @@ enum {
>> /// comparisons into existing memory operations.
>> FAULTING_LOAD_OP = 22,
>>
>> + /// The following generic opcodes are not supposed to appear after
>> ISel.
>> + /// This is something we might want to relax, but for now, this is
>> convenient
>> + /// to produce diagnostic.
>> + PRE_ISEL_GENERIC_OPCODE_START,
>> + // Generic opcodes used before ISel are here.
>> +
>> + /// Generic ADD instruction. This is an integer add.
>> + G_ADD = PRE_ISEL_GENERIC_OPCODE_START,
>> + // TODO: Add more generic opcodes as we move along.
>> + // FIXME: Right now, we have to manually add any new opcode in
>> + // CodeGenTarget.cpp for TableGen to pick them up.
>> + // Moreover the order must match.
>> +
>> + /// Marker for the end of the generic opcode.
>> + /// This is used to check if an opcode is in the range of the
>> + /// generic opcodes.
>> + PRE_ISEL_GENERIC_OPCODE_END,
>> +
>> /// BUILTIN_OP_END - This must be the last enum value in this list.
>> /// The target-specific post-isel opcode values start here.
>> - GENERIC_OP_END = FAULTING_LOAD_OP,
>> + GENERIC_OP_END = PRE_ISEL_GENERIC_OPCODE_END,
>> };
>> } // end namespace TargetOpcode
>> } // end namespace llvm
>>
>> Modified: llvm/trunk/test/TableGen/trydecode-emission.td
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/trydecode-emission.td?rev=258333&r1=258332&r2=258333&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/test/TableGen/trydecode-emission.td (original)
>> +++ llvm/trunk/test/TableGen/trydecode-emission.td Wed Jan 20 13:14:55
>> 2016
>> @@ -36,8 +36,8 @@ def InstB : TestInstruction {
>> // CHECK: /* 0 */ MCD::OPC_ExtractField, 4, 4, // Inst{7-4}
>> ...
>> // CHECK-NEXT: /* 3 */ MCD::OPC_FilterValue, 0, 14, 0, // Skip to:
>> 21
>> // CHECK-NEXT: /* 7 */ MCD::OPC_CheckField, 2, 2, 0, 5, 0, // Skip
>> to: 18
>> -// CHECK-NEXT: /* 13 */ MCD::OPC_TryDecode, 24, 0, 0, 0, // Opcode:
>> InstB, skip to: 18
>> -// CHECK-NEXT: /* 18 */ MCD::OPC_Decode, 23, 1, // Opcode: InstA
>> +// CHECK-NEXT: /* 13 */ MCD::OPC_TryDecode, 25, 0, 0, 0, // Opcode:
>> InstB, skip to: 18
>> +// CHECK-NEXT: /* 18 */ MCD::OPC_Decode, 24, 1, // Opcode: InstA
>> // CHECK-NEXT: /* 21 */ MCD::OPC_Fail,
>>
>> // CHECK: if (DecodeInstB(MI, insn, Address, Decoder) ==
>> MCDisassembler::Fail) { DecodeComplete = false; return
>> MCDisassembler::Fail; }
>>
>> Modified: llvm/trunk/test/TableGen/trydecode-emission2.td
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/trydecode-emission2.td?rev=258333&r1=258332&r2=258333&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/test/TableGen/trydecode-emission2.td (original)
>> +++ llvm/trunk/test/TableGen/trydecode-emission2.td Wed Jan 20 13:14:55
>> 2016
>> @@ -35,9 +35,9 @@ def InstB : TestInstruction {
>> // CHECK-NEXT: /* 7 */ MCD::OPC_ExtractField, 5, 3, // Inst{7-5}
>> ...
>> // CHECK-NEXT: /* 10 */ MCD::OPC_FilterValue, 0, 22, 0, // Skip to:
>> 36
>> // CHECK-NEXT: /* 14 */ MCD::OPC_CheckField, 0, 2, 3, 5, 0, // Skip
>> to: 25
>> -// CHECK-NEXT: /* 20 */ MCD::OPC_TryDecode, 24, 0, 0, 0, // Opcode:
>> InstB, skip to: 25
>> +// CHECK-NEXT: /* 20 */ MCD::OPC_TryDecode, 25, 0, 0, 0, // Opcode:
>> InstB, skip to: 25
>> // CHECK-NEXT: /* 25 */ MCD::OPC_CheckField, 3, 2, 0, 5, 0, // Skip
>> to: 36
>> -// CHECK-NEXT: /* 31 */ MCD::OPC_TryDecode, 23, 1, 0, 0, // Opcode:
>> InstA, skip to: 36
>> +// CHECK-NEXT: /* 31 */ MCD::OPC_TryDecode, 24, 1, 0, 0, // Opcode:
>> InstA, skip to: 36
>> // CHECK-NEXT: /* 36 */ MCD::OPC_Fail,
>>
>> // CHECK: if (DecodeInstB(MI, insn, Address, Decoder) ==
>> MCDisassembler::Fail) { DecodeComplete = false; return
>> MCDisassembler::Fail; }
>>
>> Modified: llvm/trunk/test/TableGen/trydecode-emission3.td
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/trydecode-emission3.td?rev=258333&r1=258332&r2=258333&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/test/TableGen/trydecode-emission3.td (original)
>> +++ llvm/trunk/test/TableGen/trydecode-emission3.td Wed Jan 20 13:14:55
>> 2016
>> @@ -37,8 +37,8 @@ def InstB : TestInstruction {
>> // CHECK: /* 0 */ MCD::OPC_ExtractField, 4, 4, // Inst{7-4}
>> ...
>> // CHECK-NEXT: /* 3 */ MCD::OPC_FilterValue, 0, 14, 0, // Skip to:
>> 21
>> // CHECK-NEXT: /* 7 */ MCD::OPC_CheckField, 2, 2, 0, 5, 0, // Skip
>> to: 18
>> -// CHECK-NEXT: /* 13 */ MCD::OPC_TryDecode, 24, 0, 0, 0, // Opcode:
>> InstB, skip to: 18
>> -// CHECK-NEXT: /* 18 */ MCD::OPC_Decode, 23, 1, // Opcode: InstA
>> +// CHECK-NEXT: /* 13 */ MCD::OPC_TryDecode, 25, 0, 0, 0, // Opcode:
>> InstB, skip to: 18
>> +// CHECK-NEXT: /* 18 */ MCD::OPC_Decode, 24, 1, // Opcode: InstA
>> // CHECK-NEXT: /* 21 */ MCD::OPC_Fail,
>>
>> // CHECK: if (DecodeInstBOp(MI, tmp, Address, Decoder) ==
>> MCDisassembler::Fail) { DecodeComplete = false; return
>> MCDisassembler::Fail; }
>>
>> Modified: llvm/trunk/utils/TableGen/CodeGenTarget.cpp
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenTarget.cpp?rev=258333&r1=258332&r2=258333&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/utils/TableGen/CodeGenTarget.cpp (original)
>> +++ llvm/trunk/utils/TableGen/CodeGenTarget.cpp Wed Jan 20 13:14:55 2016
>> @@ -301,6 +301,9 @@ GetInstByName(const char *Name,
>> /// their enum value.
>> void CodeGenTarget::ComputeInstrsByEnum() const {
>> // The ordering here must match the ordering in TargetOpcodes.h.
>> + // FIXME: It would be nice to have the opcode directly extracted
>> + // to avoid potential errors. At the very, least a compile time
>> + // error would be appreciated if the order does not match.
>> static const char *const FixedInstrs[] = {
>> "PHI", "INLINEASM", "CFI_INSTRUCTION", "EH_LABEL",
>> "GC_LABEL", "KILL", "EXTRACT_SUBREG",
>> "INSERT_SUBREG",
>> @@ -308,6 +311,8 @@ void CodeGenTarget::ComputeInstrsByEnum(
>> "REG_SEQUENCE", "COPY", "BUNDLE",
>> "LIFETIME_START",
>> "LIFETIME_END", "STACKMAP", "PATCHPOINT",
>> "LOAD_STACK_GUARD",
>> "STATEPOINT", "LOCAL_ESCAPE", "FAULTING_LOAD_OP",
>> + // Generic opcodes for GlobalISel start here.
>> + "G_ADD",
>> nullptr};
>> const auto &Insts = getInstructions();
>> for (const char *const *p = FixedInstrs; *p; ++p) {
>>
>>
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>
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