[PATCH] D16316: AVX512: Mask move intrinsic implementation.

Elena Demikhovsky via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 20 02:48:32 PST 2016


delena added inline comments.

================
Comment at: lib/Target/X86/X86InstrAVX512.td:2745
@@ -2741,3 +2744,3 @@
                 (bc_v8i64 (v16i32 immAllZerosV)), GR8:$mask)),
-       (VMOVDQU64Zrmkz (v8i1 (COPY_TO_REGCLASS GR8:$mask, VK8WM)), addr:$ptr)>;
+       (VMOVDQA64Zrmkz (v8i1 (COPY_TO_REGCLASS GR8:$mask, VK8WM)), addr:$ptr)>;
 
----------------
why loadu generates aligned mov?


Repository:
  rL LLVM

http://reviews.llvm.org/D16316





More information about the llvm-commits mailing list