[PATCH] D16252: AMDGPU: Reduce 64-bit lshr by constant to 32-bit
Tom Stellard via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 18 07:41:33 PST 2016
tstellarAMD accepted this revision.
tstellarAMD added a comment.
This revision is now accepted and ready to land.
With those fixed, LGTM.
================
Comment at: lib/Target/AMDGPU/AMDGPUISelLowering.cpp:2567-2569
@@ +2566,5 @@
+
+ SDValue Vec = DAG.getNode(ISD::BUILD_VECTOR, SL, MVT::v2i32, Zero, Lo);
+ return DAG.getNode(ISD::BITCAST, SL, MVT::i64, Vec);
+}
+
----------------
Was this change meant for another commit?
================
Comment at: lib/Target/AMDGPU/AMDGPUISelLowering.cpp:2584-2586
@@ +2583,5 @@
+
+ // srl (i64 x), C for C >= 32
+ // =>
+ // build_pair (srl (i32 hi_32(x)), (C - 32), 0)
+
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The parentheses in this comment should be fixed to make it less confusing.
http://reviews.llvm.org/D16252
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