[PATCH] D15250: Detecte vector reduction operations just before instruction selection.
Hal Finkel via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 15 06:21:32 PST 2016
hfinkel added inline comments.
================
Comment at: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:2367
@@ +2366,3 @@
+
+ if (Inst->getOpcode() == OpCode || isa<PHINode>(U)) {
+ UsersToVisit.push_back(U);
----------------
hfinkel wrote:
> hfinkel wrote:
> > We also need to check the fast-math flags on fadd/fmul here.
> We can allow selects here for the same reason we can allow phis, right? If so, we should.
(Specifically, I mean selects with a scalar condition; I assume that selects with a vector condition would not work here).
http://reviews.llvm.org/D15250
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