[llvm] r257743 - [TableGen] Pass PassSubtarget flag into getCode instead of storing a copy of the flag in every AsmWriterOperand. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 13 22:15:07 PST 2016
Author: ctopper
Date: Thu Jan 14 00:15:07 2016
New Revision: 257743
URL: http://llvm.org/viewvc/llvm-project?rev=257743&view=rev
Log:
[TableGen] Pass PassSubtarget flag into getCode instead of storing a copy of the flag in every AsmWriterOperand. NFC
Modified:
llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp
llvm/trunk/utils/TableGen/AsmWriterInst.cpp
llvm/trunk/utils/TableGen/AsmWriterInst.h
Modified: llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp?rev=257743&r1=257742&r2=257743&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp Thu Jan 14 00:15:07 2016
@@ -59,12 +59,14 @@ private:
}
void FindUniqueOperandCommands(std::vector<std::string> &UOC,
std::vector<unsigned> &InstIdxs,
- std::vector<unsigned> &InstOpsUsed) const;
+ std::vector<unsigned> &InstOpsUsed,
+ bool PassSubtarget) const;
};
} // end anonymous namespace
static void PrintCases(std::vector<std::pair<std::string,
- AsmWriterOperand> > &OpsToPrint, raw_ostream &O) {
+ AsmWriterOperand> > &OpsToPrint, raw_ostream &O,
+ bool PassSubtarget) {
O << " case " << OpsToPrint.back().first << ":";
AsmWriterOperand TheOp = OpsToPrint.back().second;
OpsToPrint.pop_back();
@@ -78,7 +80,7 @@ static void PrintCases(std::vector<std::
}
// Finally, emit the code.
- O << "\n " << TheOp.getCode();
+ O << "\n " << TheOp.getCode(PassSubtarget);
O << "\n break;\n";
}
@@ -86,7 +88,7 @@ static void PrintCases(std::vector<std::
/// EmitInstructions - Emit the last instruction in the vector and any other
/// instructions that are suitably similar to it.
static void EmitInstructions(std::vector<AsmWriterInst> &Insts,
- raw_ostream &O) {
+ raw_ostream &O, bool PassSubtarget) {
AsmWriterInst FirstInst = Insts.back();
Insts.pop_back();
@@ -115,7 +117,7 @@ static void EmitInstructions(std::vector
for (unsigned i = 0, e = FirstInst.Operands.size(); i != e; ++i) {
if (i != DifferingOperand) {
// If the operand is the same for all instructions, just print it.
- O << " " << FirstInst.Operands[i].getCode();
+ O << " " << FirstInst.Operands[i].getCode(PassSubtarget);
} else {
// If this is the operand that varies between all of the instructions,
// emit a switch for just this operand now.
@@ -133,7 +135,7 @@ static void EmitInstructions(std::vector
}
std::reverse(OpsToPrint.begin(), OpsToPrint.end());
while (!OpsToPrint.empty())
- PrintCases(OpsToPrint, O);
+ PrintCases(OpsToPrint, O, PassSubtarget);
O << " }";
}
O << "\n";
@@ -144,7 +146,8 @@ static void EmitInstructions(std::vector
void AsmWriterEmitter::
FindUniqueOperandCommands(std::vector<std::string> &UniqueOperandCommands,
std::vector<unsigned> &InstIdxs,
- std::vector<unsigned> &InstOpsUsed) const {
+ std::vector<unsigned> &InstOpsUsed,
+ bool PassSubtarget) const {
InstIdxs.assign(NumberedInstructions->size(), ~0U);
// This vector parallels UniqueOperandCommands, keeping track of which
@@ -162,7 +165,7 @@ FindUniqueOperandCommands(std::vector<st
if (Inst->Operands.empty())
continue; // Instruction already done.
- std::string Command = " " + Inst->Operands[0].getCode() + "\n";
+ std::string Command = " "+Inst->Operands[0].getCode(PassSubtarget)+"\n";
// Check to see if we already have 'Command' in UniqueOperandCommands.
// If not, add it.
@@ -226,7 +229,8 @@ FindUniqueOperandCommands(std::vector<st
// Okay, everything in this command set has the same next operand. Add it
// to UniqueOperandCommands and remember that it was consumed.
- std::string Command = " " + FirstInst->Operands[Op].getCode() + "\n";
+ std::string Command = " " +
+ FirstInst->Operands[Op].getCode(PassSubtarget) + "\n";
UniqueOperandCommands[CommandIdx] += Command;
InstOpsUsed[CommandIdx]++;
@@ -277,7 +281,7 @@ static void UnescapeString(std::string &
void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) {
Record *AsmWriter = Target.getAsmWriter();
std::string ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
- unsigned PassSubtarget = AsmWriter->getValueAsInt("PassSubtarget");
+ bool PassSubtarget = AsmWriter->getValueAsInt("PassSubtarget");
O <<
"/// printInstruction - This method is automatically generated by tablegen\n"
@@ -351,7 +355,7 @@ void AsmWriterEmitter::EmitPrintInstruct
std::vector<unsigned> InstIdxs;
std::vector<unsigned> NumInstOpsHandled;
FindUniqueOperandCommands(UniqueOperandCommands, InstIdxs,
- NumInstOpsHandled);
+ NumInstOpsHandled, PassSubtarget);
// If we ran out of operands to print, we're done.
if (UniqueOperandCommands.empty()) break;
@@ -502,7 +506,7 @@ void AsmWriterEmitter::EmitPrintInstruct
O << " switch (MI->getOpcode()) {\n";
O << " default: llvm_unreachable(\"Unexpected opcode.\");\n";
while (!Instructions.empty())
- EmitInstructions(Instructions, O);
+ EmitInstructions(Instructions, O, PassSubtarget);
O << " }\n";
}
@@ -784,7 +788,7 @@ void AsmWriterEmitter::EmitPrintAliasIns
// Emit the method that prints the alias instruction.
std::string ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
unsigned Variant = AsmWriter->getValueAsInt("Variant");
- unsigned PassSubtarget = AsmWriter->getValueAsInt("PassSubtarget");
+ bool PassSubtarget = AsmWriter->getValueAsInt("PassSubtarget");
std::vector<Record*> AllInstAliases =
Records.getAllDerivedDefinitions("InstAlias");
@@ -1089,10 +1093,9 @@ void AsmWriterEmitter::EmitPrintAliasIns
AsmWriterEmitter::AsmWriterEmitter(RecordKeeper &R) : Records(R), Target(R) {
Record *AsmWriter = Target.getAsmWriter();
unsigned Variant = AsmWriter->getValueAsInt("Variant");
- unsigned PassSubtarget = AsmWriter->getValueAsInt("PassSubtarget");
for (const CodeGenInstruction *I : Target.instructions())
if (!I->AsmString.empty() && I->TheDef->getName() != "PHI")
- Instructions.emplace_back(*I, Variant, PassSubtarget);
+ Instructions.emplace_back(*I, Variant);
// Get the instruction numbering.
NumberedInstructions = &Target.getInstructionsByEnumValue();
Modified: llvm/trunk/utils/TableGen/AsmWriterInst.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmWriterInst.cpp?rev=257743&r1=257742&r2=257743&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/AsmWriterInst.cpp (original)
+++ llvm/trunk/utils/TableGen/AsmWriterInst.cpp Thu Jan 14 00:15:07 2016
@@ -26,7 +26,7 @@ static bool isIdentChar(char C) {
C == '_';
}
-std::string AsmWriterOperand::getCode() const {
+std::string AsmWriterOperand::getCode(bool PassSubtarget) const {
if (OperandType == isLiteralTextOperand) {
if (Str.size() == 1)
return "O << '" + Str + "';";
@@ -50,8 +50,7 @@ std::string AsmWriterOperand::getCode()
/// ParseAsmString - Parse the specified Instruction's AsmString into this
/// AsmWriterInst.
///
-AsmWriterInst::AsmWriterInst(const CodeGenInstruction &CGI, unsigned Variant,
- unsigned PassSubtarget) {
+AsmWriterInst::AsmWriterInst(const CodeGenInstruction &CGI, unsigned Variant) {
this->CGI = &CGI;
// NOTE: Any extensions to this code need to be mirrored in the
@@ -163,16 +162,14 @@ AsmWriterInst::AsmWriterInst(const CodeG
if (VarName.empty()) {
// Just a modifier, pass this into PrintSpecial.
- Operands.emplace_back("PrintSpecial", ~0U, ~0U, Modifier,
- PassSubtarget);
+ Operands.emplace_back("PrintSpecial", ~0U, ~0U, Modifier);
} else {
// Otherwise, normal operand.
unsigned OpNo = CGI.Operands.getOperandNamed(VarName);
CGIOperandList::OperandInfo OpInfo = CGI.Operands[OpNo];
unsigned MIOp = OpInfo.MIOperandNo;
- Operands.emplace_back(OpInfo.PrinterMethodName, OpNo, MIOp, Modifier,
- PassSubtarget);
+ Operands.emplace_back(OpInfo.PrinterMethodName, OpNo, MIOp, Modifier);
}
LastEmitted = VarEnd;
}
Modified: llvm/trunk/utils/TableGen/AsmWriterInst.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmWriterInst.h?rev=257743&r1=257742&r2=257743&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/AsmWriterInst.h (original)
+++ llvm/trunk/utils/TableGen/AsmWriterInst.h Thu Jan 14 00:15:07 2016
@@ -53,11 +53,6 @@ namespace llvm {
/// an operand, specified with syntax like ${opname:modifier}.
std::string MiModifier;
- // PassSubtarget - Pass MCSubtargetInfo to the print method if this is
- // equal to 1.
- // FIXME: Remove after all ports are updated.
- unsigned PassSubtarget;
-
// To make VS STL happy
AsmWriterOperand(OpType op = isLiteralTextOperand):OperandType(op) {}
@@ -69,10 +64,9 @@ namespace llvm {
unsigned _CGIOpNo,
unsigned _MIOpNo,
const std::string &Modifier,
- unsigned PassSubtarget,
OpType op = isMachineInstrOperand)
: OperandType(op), Str(Printer), CGIOpNo(_CGIOpNo), MIOpNo(_MIOpNo),
- MiModifier(Modifier), PassSubtarget(PassSubtarget) {}
+ MiModifier(Modifier) {}
bool operator!=(const AsmWriterOperand &Other) const {
if (OperandType != Other.OperandType || Str != Other.Str) return true;
@@ -85,7 +79,7 @@ namespace llvm {
}
/// getCode - Return the code that prints this operand.
- std::string getCode() const;
+ std::string getCode(bool PassSubtarget) const;
};
class AsmWriterInst {
@@ -93,8 +87,7 @@ namespace llvm {
std::vector<AsmWriterOperand> Operands;
const CodeGenInstruction *CGI;
- AsmWriterInst(const CodeGenInstruction &CGI,
- unsigned Variant, unsigned PassSubtarget);
+ AsmWriterInst(const CodeGenInstruction &CGI, unsigned Variant);
/// MatchesAllButOneOp - If this instruction is exactly identical to the
/// specified instruction except for one differing operand, return the
More information about the llvm-commits
mailing list