[PATCH] D15278: [ARMv8-M] [5/9] Add B.W and CBZ instructions to ARMv8-M Baseline

[Tim Northover via llvm-commits]

t.p.northover added a comment.

One minor comment on the logic here (though I don't think it would ever make a difference in practice):


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Comment at: lib/Target/ARM/ARMSubtarget.cpp:237
@@ -236,3 +236,3 @@
 
-  SupportsTailCall = !isThumb1Only();
+  SupportsTailCall = !isThumb1Only() || hasV8MBaselineOps();
 
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Isn't the logic here really "!isThumb() || hasV8MBaselineOps()"? The Feature check part of isThumb1Only seems to be redundant since any T2-capable processor will have 8M baseline.

Or am I misunderstanding?


Repository:
  rL LLVM

http://reviews.llvm.org/D15278