[PATCH] D16069: AMDGPU: Implement {{s|u}}int_to_fp i64 -> f32

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 11 13:21:55 PST 2016


arsenm added inline comments.

================
Comment at: lib/Target/AMDGPU/AMDGPUISelLowering.cpp:2233-2236
@@ +2232,6 @@
+  //  uint e = (u != 0) ? 127U + 63U - lz : 0;
+  //  u = (u << lz) & 0x7fffffffffffffffUL;
+  //  ulong t = u & 0xffffffffffUL;
+  //  uint v = (e << 23) | (uint)(u >> 40);
+  //  uint r = t > 0x8000000000UL ? 1U : (t == 0x8000000000UL ? v & 1U : 0U);
+  //  return as_float(v + r);
----------------
nhaehnle wrote:
> I was thinking a bit about this because of all the i64, but it quickly gets messy and it's not clear to me that there is a much better way. I wonder whether bitcasting u to v2i32 and only shifting the high dword by 8 results in better code, but I'm fine with not trying that.
There are a few missing combines I'm working on that impact this that SC does. For example, the > 32 bit shift is split into a 32-bit shift and a mov 0. It's best to implement those separately rather than trying to specially emit them here


http://reviews.llvm.org/D16069





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