[llvm] r257156 - [TableGen] Use range-based for loops. Also fix one loop to not use some index name as an outer loop. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 7 23:06:32 PST 2016
Author: ctopper
Date: Fri Jan 8 01:06:32 2016
New Revision: 257156
URL: http://llvm.org/viewvc/llvm-project?rev=257156&view=rev
Log:
[TableGen] Use range-based for loops. Also fix one loop to not use some index name as an outer loop. NFC
Modified:
llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp
Modified: llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp?rev=257156&r1=257155&r2=257156&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp Fri Jan 8 01:06:32 2016
@@ -109,9 +109,9 @@ static void EmitInstructions(std::vector
O << " case " << FirstInst.CGI->Namespace << "::"
<< FirstInst.CGI->TheDef->getName() << ":\n";
- for (unsigned i = 0, e = SimilarInsts.size(); i != e; ++i)
- O << " case " << SimilarInsts[i].CGI->Namespace << "::"
- << SimilarInsts[i].CGI->TheDef->getName() << ":\n";
+ for (const AsmWriterInst &AWI : SimilarInsts)
+ O << " case " << AWI.CGI->Namespace << "::"
+ << AWI.CGI->TheDef->getName() << ":\n";
for (unsigned i = 0, e = FirstInst.Operands.size(); i != e; ++i) {
if (i != DifferingOperand) {
// If the operand is the same for all instructions, just print it.
@@ -125,8 +125,7 @@ static void EmitInstructions(std::vector
FirstInst.CGI->TheDef->getName(),
FirstInst.Operands[i]));
- for (unsigned si = 0, e = SimilarInsts.size(); si != e; ++si) {
- AsmWriterInst &AWI = SimilarInsts[si];
+ for (const AsmWriterInst &AWI : SimilarInsts) {
OpsToPrint.push_back(std::make_pair(AWI.CGI->Namespace+"::"+
AWI.CGI->TheDef->getName(),
AWI.Operands[i]));
@@ -298,8 +297,8 @@ void AsmWriterEmitter::EmitPrintInstruct
// Add all strings to the string table upfront so it can generate an optimized
// representation.
- for (unsigned i = 0, e = NumberedInstructions->size(); i != e; ++i) {
- AsmWriterInst *AWI = CGIAWIMap[NumberedInstructions->at(i)];
+ for (const CodeGenInstruction *Inst : *NumberedInstructions) {
+ AsmWriterInst *AWI = CGIAWIMap[Inst];
if (AWI &&
AWI->Operands[0].OperandType ==
AsmWriterOperand::isLiteralTextOperand &&
@@ -313,8 +312,8 @@ void AsmWriterEmitter::EmitPrintInstruct
StringTable.layout();
unsigned MaxStringIdx = 0;
- for (unsigned i = 0, e = NumberedInstructions->size(); i != e; ++i) {
- AsmWriterInst *AWI = CGIAWIMap[NumberedInstructions->at(i)];
+ for (const CodeGenInstruction *Inst : *NumberedInstructions) {
+ AsmWriterInst *AWI = CGIAWIMap[Inst];
unsigned Idx;
if (!AWI) {
// Something not handled by the asmwriter printer.
@@ -472,9 +471,9 @@ void AsmWriterEmitter::EmitPrintInstruct
<< " default: llvm_unreachable(\"Invalid command number.\");\n";
// Print out all the cases.
- for (unsigned i = 0, e = Commands.size(); i != e; ++i) {
- O << " case " << i << ":\n";
- O << Commands[i];
+ for (unsigned j = 0, e = Commands.size(); j != e; ++j) {
+ O << " case " << j << ":\n";
+ O << Commands[j];
O << " break;\n";
}
O << " }\n\n";
@@ -602,16 +601,16 @@ void AsmWriterEmitter::EmitGetRegisterNa
<< "\n";
if (hasAltNames) {
- for (unsigned i = 0, e = AltNameIndices.size(); i < e; ++i)
- emitRegisterNameString(O, AltNameIndices[i]->getName(), Registers);
+ for (const Record *R : AltNameIndices)
+ emitRegisterNameString(O, R->getName(), Registers);
} else
emitRegisterNameString(O, "", Registers);
if (hasAltNames) {
O << " switch(AltIdx) {\n"
<< " default: llvm_unreachable(\"Invalid register alt name index!\");\n";
- for (unsigned i = 0, e = AltNameIndices.size(); i < e; ++i) {
- std::string AltName(AltNameIndices[i]->getName());
+ for (const Record *R : AltNameIndices) {
+ std::string AltName(R->getName());
std::string Prefix = !Namespace.empty() ? Namespace + "::" : "";
O << " case " << Prefix << AltName << ":\n"
<< " assert(*(AsmStrs" << AltName << "+RegAsmOffset"
@@ -798,9 +797,7 @@ void AsmWriterEmitter::EmitPrintAliasIns
typedef std::set<std::pair<CodeGenInstAlias, int>, AliasPriorityComparator>
AliasWithPriority;
std::map<std::string, AliasWithPriority> AliasMap;
- for (std::vector<Record*>::iterator
- I = AllInstAliases.begin(), E = AllInstAliases.end(); I != E; ++I) {
- const Record *R = *I;
+ for (Record *R : AllInstAliases) {
int Priority = R->getValueAsInt("EmitPriority");
if (Priority < 1)
continue; // Aliases with priority 0 are never emitted.
@@ -808,7 +805,7 @@ void AsmWriterEmitter::EmitPrintAliasIns
const DagInit *DI = R->getValueAsDag("ResultInst");
const DefInit *Op = cast<DefInit>(DI->getOperator());
AliasMap[getQualifiedName(Op->getDef())].insert(
- std::make_pair(CodeGenInstAlias(*I, Variant, Target), Priority));
+ std::make_pair(CodeGenInstAlias(R, Variant, Target), Priority));
}
// A map of which conditions need to be met for each instruction operand
@@ -976,9 +973,7 @@ void AsmWriterEmitter::EmitPrintAliasIns
CasesO.indent(2) << "case " << Entry.first << ":\n";
- for (std::vector<IAPrinter*>::iterator
- II = UniqueIAPs.begin(), IE = UniqueIAPs.end(); II != IE; ++II) {
- IAPrinter *IAP = *II;
+ for (IAPrinter *IAP : UniqueIAPs) {
CasesO.indent(4);
IAP->print(CasesO);
CasesO << '\n';
@@ -1108,8 +1103,8 @@ AsmWriterEmitter::AsmWriterEmitter(Recor
// Compute the CodeGenInstruction -> AsmWriterInst mapping. Note that not
// all machine instructions are necessarily being printed, so there may be
// target instructions not in this map.
- for (unsigned i = 0, e = Instructions.size(); i != e; ++i)
- CGIAWIMap.insert(std::make_pair(Instructions[i].CGI, &Instructions[i]));
+ for (AsmWriterInst &AWI : Instructions)
+ CGIAWIMap.insert(std::make_pair(AWI.CGI, &AWI));
}
void AsmWriterEmitter::run(raw_ostream &O) {
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