[llvm] r256817 - [X86] Add OpSize32 to OR32mrLocked instruction to match the normal OR32mr instruction.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Tue Jan  5 01:44:11 2016
New Revision: 256817

URL: http://llvm.org/viewvc/llvm-project?rev=256817&view=rev
Log:
[X86] Add OpSize32 to OR32mrLocked instruction to match the normal OR32mr instruction.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrCompiler.td

Modified: llvm/trunk/lib/Target/X86/X86InstrCompiler.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrCompiler.td?rev=256817&r1=256816&r2=256817&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrCompiler.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrCompiler.td Tue Jan  5 01:44:11 2016
@@ -555,8 +555,8 @@ let usesCustomInserter = 1, Uses = [EFLA
 // TODO: Get this to fold the constant into the instruction.
 let isCodeGenOnly = 1, Defs = [EFLAGS] in
 def OR32mrLocked  : I<0x09, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$zero),
-                      "or{l}\t{$zero, $dst|$dst, $zero}",
-                      [], IIC_ALU_MEM>, Requires<[Not64BitMode]>, LOCK,
+                      "or{l}\t{$zero, $dst|$dst, $zero}", [],
+                      IIC_ALU_MEM>, Requires<[Not64BitMode]>, OpSize32, LOCK,
                     Sched<[WriteALULd, WriteRMW]>;
 
 let hasSideEffects = 1 in