[llvm] r256670 - [X86][PKU] Add {RD,WR}PKRU intrinsics
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 31 17:30:08 PST 2015
On Thu, Dec 31, 2015 at 12:31 AM, Asaf Badouh via llvm-commits <
llvm-commits at lists.llvm.org> wrote:
> Author: abadouh
> Date: Thu Dec 31 02:31:13 2015
> New Revision: 256670
>
> URL: http://llvm.org/viewvc/llvm-project?rev=256670&view=rev
> Log:
> [X86][PKU] Add {RD,WR}PKRU intrinsics
>
> Differential Revision: http://reviews.llvm.org/D15808
>
> Added:
> llvm/trunk/test/CodeGen/X86/pku.ll
> Modified:
> llvm/trunk/include/llvm/IR/IntrinsicsX86.td
> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> llvm/trunk/lib/Target/X86/X86InstrSystem.td
>
> Modified: llvm/trunk/include/llvm/IR/IntrinsicsX86.td
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IR/IntrinsicsX86.td?rev=256670&r1=256669&r2=256670&view=diff
>
> ==============================================================================
> --- llvm/trunk/include/llvm/IR/IntrinsicsX86.td (original)
> +++ llvm/trunk/include/llvm/IR/IntrinsicsX86.td Thu Dec 31 02:31:13 2015
> @@ -3919,9 +3919,9 @@ let TargetPrefix = "x86" in { // All in
> // Support protection key
> let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
> def int_x86_rdpkru : GCCBuiltin <"__builtin_ia32_rdpkru">,
> - Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>;
> + Intrinsic<[llvm_i32_ty], [], []>;
> def int_x86_wrpkru : GCCBuiltin<"__builtin_ia32_wrpkru">,
> - Intrinsic<[], [llvm_i32_ty], [IntrNoMem]>;
> + Intrinsic<[], [llvm_i32_ty], []>;
> }
>
> //===----------------------------------------------------------------------===//
> // Half float conversion
>
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=256670&r1=256669&r2=256670&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Dec 31 02:31:13 2015
> @@ -21144,6 +21144,47 @@ static MachineBasicBlock *EmitPCMPSTRI(M
> return BB;
> }
>
> +static MachineBasicBlock *EmitWRPKRU(MachineInstr *MI, MachineBasicBlock
> *BB,
> + const X86Subtarget *Subtarget) {
> + DebugLoc dl = MI->getDebugLoc();
> + const TargetInstrInfo *TII = Subtarget->getInstrInfo();
> +
> + // insert input VAL into EAX
> + BuildMI(*BB, MI, dl, TII->get(TargetOpcode::COPY), X86::EAX)
> + .addReg(MI->getOperand(0).getReg());
> + // insert zero to ECX
> + BuildMI(*BB, MI, dl, TII->get(X86::XOR32rr), X86::ECX)
> + .addReg(X86::ECX)
> + .addReg(X86::ECX);
> + // insert zero to EDX
> + BuildMI(*BB, MI, dl, TII->get(X86::XOR32rr), X86::EDX)
> + .addReg(X86::EDX)
> + .addReg(X86::EDX);
> + // insert WRPKRU instruction
> + BuildMI(*BB, MI, dl, TII->get(X86::WRPKRUr));
> +
> + MI->eraseFromParent(); // The pseudo is gone now.
> + return BB;
> +}
> +
> +static MachineBasicBlock *EmitRDPKRU(MachineInstr *MI, MachineBasicBlock
> *BB,
> + const X86Subtarget *Subtarget) {
> + DebugLoc dl = MI->getDebugLoc();
> + const TargetInstrInfo *TII = Subtarget->getInstrInfo();
> +
> + // insert zero to ECX
> + BuildMI(*BB, MI, dl, TII->get(X86::XOR32rr), X86::ECX)
> + .addReg(X86::ECX)
> + .addReg(X86::ECX);
> + // insert RDPKRU instruction
> + BuildMI(*BB, MI, dl, TII->get(X86::RDPKRUr));
> + BuildMI(*BB, MI, dl, TII->get(TargetOpcode::COPY),
> MI->getOperand(0).getReg())
> + .addReg(X86::EAX);
> +
> + MI->eraseFromParent(); // The pseudo is gone now.
> + return BB;
> +}
> +
> static MachineBasicBlock *EmitMonitor(MachineInstr *MI, MachineBasicBlock
> *BB,
> const X86Subtarget *Subtarget) {
> DebugLoc dl = MI->getDebugLoc();
> @@ -22611,7 +22652,11 @@ X86TargetLowering::EmitInstrWithCustomIn
> // Thread synchronization.
> case X86::MONITOR:
> return EmitMonitor(MI, BB, Subtarget);
> -
> + // PKU feature
> + case X86::WRPKRU:
> + return EmitWRPKRU(MI, BB, Subtarget);
> + case X86::RDPKRU:
> + return EmitRDPKRU(MI, BB, Subtarget);
> // xbegin
> case X86::XBEGIN:
> return EmitXBegin(MI, BB, Subtarget->getInstrInfo());
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrSystem.td
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSystem.td?rev=256670&r1=256669&r2=256670&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrSystem.td (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrSystem.td Thu Dec 31 02:31:13 2015
> @@ -551,10 +551,17 @@ let Defs = [RAX, RDX, RSI], Uses = [RAX,
> def MONTMUL : I<0xa6, MRM_C0, (outs), (ins), "montmul", []>, TB;
>
> //==-----------------------------------------------------------------------===//
> // PKU - enable protection key
> +let usesCustomInserter = 1 in {
> + def WRPKRU : PseudoI<(outs), (ins GR32:$src),
> + [(int_x86_wrpkru GR32:$src)]>;
> + def RDPKRU : PseudoI<(outs GR32:$dst), (ins),
> + [(set GR32:$dst, (int_x86_rdpkru))]>;
> +}
> +
> let Defs = [EAX, EDX], Uses = [ECX] in
> - def RDPKRU : I<0x01, MRM_EE, (outs), (ins), "rdpkru", []>, TB;
> + def RDPKRUr : I<0x01, MRM_EE, (outs), (ins), "rdpkru", []>, TB;
> let Uses = [EAX, ECX, EDX] in
> - def WRPKRU : I<0x01, MRM_EF, (outs), (ins), "wrpkru", []>, TB;
> + def WRPKRUr : I<0x01, MRM_EF, (outs), (ins), "wrpkru", []>, TB;
>
Shouldn't this be qualified with the feature flag?
>
>
> //===----------------------------------------------------------------------===//
> // FS/GS Base Instructions
>
> Added: llvm/trunk/test/CodeGen/X86/pku.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pku.ll?rev=256670&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/pku.ll (added)
> +++ llvm/trunk/test/CodeGen/X86/pku.ll Thu Dec 31 02:31:13 2015
> @@ -0,0 +1,25 @@
> +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl
> --show-mc-encoding| FileCheck %s
> +declare i32 @llvm.x86.rdpkru()
> +declare void @llvm.x86.wrpkru(i32)
> +
> +define void @test_x86_wrpkru(i32 %src) {
> +; CHECK-LABEL: test_x86_wrpkru:
> +; CHECK: ## BB#0:
> +; CHECK-NEXT: xorl %ecx, %ecx
> +; CHECK-NEXT: xorl %edx, %edx
> +; CHECK-NEXT: movl %edi, %eax
> +; CHECK-NEXT: wrpkru
> +; CHECK-NEXT: retq
> + call void @llvm.x86.wrpkru(i32 %src)
> + ret void
> +}
> +
> +define i32 @test_x86_rdpkru() {
> +; CHECK-LABEL: test_x86_rdpkru:
> +; CHECK: ## BB#0:
> +; CHECK-NEXT: xorl %ecx, %ecx
> +; CHECK-NEXT: rdpkru
> +; CHECK-NEXT: retq
> + %res = call i32 @llvm.x86.rdpkru()
> + ret i32 %res
> +}
>
>
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--
~Craig
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