[PATCH] D15751: [AVX512] add PSRLW Intrinsic

[Igor Breger via llvm-commits]

igorb added a comment.

please use utils/update_llc_test_checks.py script to generate CHECKs, don't put encoding.
Missing tests without mask ( vpsrlw $255, %zmm0, %zmm1) version.


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Comment at: include/llvm/IR/IntrinsicsX86.td:2200
@@ +2199,3 @@
+              Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+                         llvm_v8i16_ty,llvm_v16i16_ty,llvm_i16_ty], [IntrNoMem]>;
+  def int_x86_avx512_mask_psrl_w_512 : GCCBuiltin<"__builtin_ia32_psrlw512_mask">,
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please add whitespace 

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Comment at: test/CodeGen/X86/avx512bwvl-intrinsics.ll:4415
@@ -4414,1 +4414,3 @@
 }
+declare <8 x i16> @llvm.x86.avx512.mask.psrl.w.128(<8 x i16>, <8 x i16>,<8 x i16> ,i8) nounwind readnone
+define <8 x i16> @test_psrlw_128(<8 x i16> %src,<8 x i16> %a0,<8 x i16> %count,i8 %mask) {
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please add whitespace

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Comment at: test/CodeGen/X86/avx512bwvl-intrinsics.ll:4475
@@ +4474,3 @@
+}
+
+
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remove empty line

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Comment at: test/CodeGen/X86/avx512bwvl-intrinsics.ll:4492
@@ +4491,3 @@
+
+declare <32 x i16> @llvm.x86.avx512.mask.psrli.w.512(<32 x i16>,i8 %imm,<32 x i16> ,i32) nounwind readnone
+define <32 x i16> @test_psrlwi_512(<32 x i16> %src,i8 %imm,<32 x i16> %a0,i32 %mask) {
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Requare only AVX512BW , move 512bit tests to avx512bw-intrinsics.ll


http://reviews.llvm.org/D15751