[PATCH] D15763: AMDGPU/SI: Move VI SMEM pattern back into VIInstructions.td

[Tom Stellard via llvm-commits]

tstellarAMD created this revision.
tstellarAMD added reviewers: arsenm, cfang.
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This was accidently moved to CIInstructions.td in r256282

http://reviews.llvm.org/D15763

Files:
  lib/Target/AMDGPU/CIInstructions.td
  lib/Target/AMDGPU/VIInstructions.td

Index: lib/Target/AMDGPU/VIInstructions.td
===================================================================
--- lib/Target/AMDGPU/VIInstructions.td
+++ lib/Target/AMDGPU/VIInstructions.td
@@ -101,3 +101,12 @@
 
 } // End SIAssemblerPredicate = DisableInst, SubtargetPredicate = isVI
 
+let Predicates = [isVI] in {
+
+// 1. Offset as 20bit DWORD immediate
+def : Pat <
+  (SIload_constant v4i32:$sbase, IMM20bit:$offset),
+  (S_BUFFER_LOAD_DWORD_IMM $sbase, (as_i32imm $offset))
+>;
+
+} // End Predicates = [isVI]
Index: lib/Target/AMDGPU/CIInstructions.td
===================================================================
--- lib/Target/AMDGPU/CIInstructions.td
+++ lib/Target/AMDGPU/CIInstructions.td
@@ -244,12 +244,6 @@
 
 let Predicates = [useFlatForGlobal] in {
 
-// 1. Offset as 20bit DWORD immediate
-def : Pat <
-  (SIload_constant v4i32:$sbase, IMM20bit:$offset),
-  (S_BUFFER_LOAD_DWORD_IMM $sbase, (as_i32imm $offset))
->;
-
 // Patterns for global loads with no offset
 class FlatLoadPat <FLAT inst, SDPatternOperator node, ValueType vt> : Pat <
   (vt (node i64:$addr)),


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