[PATCH] D15711: [X86][PKU] Add {RD,WR}PKRU encoding
Asaf Badouh via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 23 05:36:54 PST 2015
AsafBadouh updated this revision to Diff 43527.
http://reviews.llvm.org/D15711
Files:
../trunk/include/llvm/IR/IntrinsicsX86.td
../trunk/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
../trunk/lib/Target/X86/X86InstrSystem.td
../trunk/test/MC/X86/X86_64-pku.s
../trunk/utils/TableGen/X86RecognizableInstr.cpp
Index: ../trunk/lib/Target/X86/X86InstrSystem.td
===================================================================
--- ../trunk/lib/Target/X86/X86InstrSystem.td
+++ ../trunk/lib/Target/X86/X86InstrSystem.td
@@ -549,6 +549,12 @@
}
let Defs = [RAX, RDX, RSI], Uses = [RAX, RSI] in
def MONTMUL : I<0xa6, MRM_C0, (outs), (ins), "montmul", []>, TB;
+//==-----------------------------------------------------------------------===//
+// PKU - enable protection key
+let Defs = [EAX, EDX], Uses = [ECX] in
+ def RDPKRU : I<0x01, MRM_EE, (outs), (ins), "rdpkru", []>, TB;
+let Uses = [EAX, ECX, EDX] in
+ def WRPKRU : I<0x01, MRM_EF, (outs), (ins), "wrpkru", []>, TB;
//===----------------------------------------------------------------------===//
// FS/GS Base Instructions
Index: ../trunk/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
===================================================================
--- ../trunk/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
+++ ../trunk/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
@@ -707,12 +707,12 @@
case X86II::MRM_E3: case X86II::MRM_E4: case X86II::MRM_E5:
case X86II::MRM_E8: case X86II::MRM_E9: case X86II::MRM_EA:
case X86II::MRM_EB: case X86II::MRM_EC: case X86II::MRM_ED:
- case X86II::MRM_EE: case X86II::MRM_F0: case X86II::MRM_F1:
- case X86II::MRM_F2: case X86II::MRM_F3: case X86II::MRM_F4:
- case X86II::MRM_F5: case X86II::MRM_F6: case X86II::MRM_F7:
- case X86II::MRM_F8: case X86II::MRM_F9: case X86II::MRM_FA:
- case X86II::MRM_FB: case X86II::MRM_FC: case X86II::MRM_FD:
- case X86II::MRM_FE: case X86II::MRM_FF:
+ case X86II::MRM_EE: case X86II::MRM_EF: case X86II::MRM_F0:
+ case X86II::MRM_F1: case X86II::MRM_F2: case X86II::MRM_F3:
+ case X86II::MRM_F4: case X86II::MRM_F5: case X86II::MRM_F6:
+ case X86II::MRM_F7: case X86II::MRM_F8: case X86II::MRM_F9:
+ case X86II::MRM_FA: case X86II::MRM_FB: case X86II::MRM_FC:
+ case X86II::MRM_FD: case X86II::MRM_FE: case X86II::MRM_FF:
return -1;
}
}
Index: ../trunk/utils/TableGen/X86RecognizableInstr.cpp
===================================================================
--- ../trunk/utils/TableGen/X86RecognizableInstr.cpp
+++ ../trunk/utils/TableGen/X86RecognizableInstr.cpp
@@ -796,12 +796,12 @@
case X86Local::MRM_E3: case X86Local::MRM_E4: case X86Local::MRM_E5:
case X86Local::MRM_E8: case X86Local::MRM_E9: case X86Local::MRM_EA:
case X86Local::MRM_EB: case X86Local::MRM_EC: case X86Local::MRM_ED:
- case X86Local::MRM_EE: case X86Local::MRM_F0: case X86Local::MRM_F1:
- case X86Local::MRM_F2: case X86Local::MRM_F3: case X86Local::MRM_F4:
- case X86Local::MRM_F5: case X86Local::MRM_F6: case X86Local::MRM_F7:
- case X86Local::MRM_F9: case X86Local::MRM_FA: case X86Local::MRM_FB:
- case X86Local::MRM_FC: case X86Local::MRM_FD: case X86Local::MRM_FE:
- case X86Local::MRM_FF:
+ case X86Local::MRM_EE: case X86Local::MRM_EF: case X86Local::MRM_F0:
+ case X86Local::MRM_F1: case X86Local::MRM_F2: case X86Local::MRM_F3:
+ case X86Local::MRM_F4: case X86Local::MRM_F5: case X86Local::MRM_F6:
+ case X86Local::MRM_F7: case X86Local::MRM_F9: case X86Local::MRM_FA:
+ case X86Local::MRM_FB: case X86Local::MRM_FC: case X86Local::MRM_FD:
+ case X86Local::MRM_FE: case X86Local::MRM_FF:
// Ignored.
break;
}
Index: ../trunk/include/llvm/IR/IntrinsicsX86.td
===================================================================
--- ../trunk/include/llvm/IR/IntrinsicsX86.td
+++ ../trunk/include/llvm/IR/IntrinsicsX86.td
@@ -3897,6 +3897,14 @@
}
//===----------------------------------------------------------------------===//
+// Support protection key
+let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_rdpkru : GCCBuiltin <"__builtin_ia32_rdpkru">,
+ Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>;
+ def int_x86_wrpkru : GCCBuiltin<"__builtin_ia32_wrpkru">,
+ Intrinsic<[], [llvm_i32_ty], [IntrNoMem]>;
+}
+//===----------------------------------------------------------------------===//
// Half float conversion
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
Index: ../trunk/test/MC/X86/X86_64-pku.s
===================================================================
--- ../trunk/test/MC/X86/X86_64-pku.s
+++ ../trunk/test/MC/X86/X86_64-pku.s
@@ -0,0 +1,8 @@
+// RUN: llvm-mc -triple x86_64-unknown-unknown -mattr=+pku --show-encoding < %s | FileCheck %s
+// CHECK: rdpkru
+// CHECK: encoding: [0x0f,0x01,0xee]
+ rdpkru
+
+// CHECK: wrpkru
+// CHECK: encoding: [0x0f,0x01,0xef]
+ wrpkru
\ No newline at end of file
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