[PATCH] D15740: [mips] Add SHF_MIPS_GPREL flag to the MIPS .sbss and .sdata sections

[Simon Atanasyan via llvm-commits]

atanasyan created this revision.
atanasyan added a reviewer: dsanders.
atanasyan added a subscriber: llvm-commits.
atanasyan set the repository for this revision to rL LLVM.
Herald added a subscriber: dsanders.

MIPS ABI states that `.sbss` and `.sdata` sections must have `SHF_MIPS_GPREL` flag. See Figure 4–7 on page 69 in the following document: ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf.

The patch applies this flag and adds support for this flag to the `llvm-readobj` tool.

Repository:
  rL LLVM

http://reviews.llvm.org/D15740

Files:
  lib/Target/Mips/MipsTargetObjectFile.cpp
  test/CodeGen/Mips/mips-shf-gprel.ll
  tools/llvm-readobj/ELFDumper.cpp

Index: tools/llvm-readobj/ELFDumper.cpp
===================================================================
--- tools/llvm-readobj/ELFDumper.cpp
+++ tools/llvm-readobj/ELFDumper.cpp
@@ -800,6 +800,7 @@
   LLVM_READOBJ_ENUM_ENT(ELF, XCORE_SHF_CP_SECTION),
   LLVM_READOBJ_ENUM_ENT(ELF, XCORE_SHF_DP_SECTION),
   LLVM_READOBJ_ENUM_ENT(ELF, SHF_MIPS_NOSTRIP    ),
+  LLVM_READOBJ_ENUM_ENT(ELF, SHF_MIPS_GPREL      ),
   LLVM_READOBJ_ENUM_ENT(ELF, SHF_AMDGPU_HSA_GLOBAL),
   LLVM_READOBJ_ENUM_ENT(ELF, SHF_AMDGPU_HSA_READONLY),
   LLVM_READOBJ_ENUM_ENT(ELF, SHF_AMDGPU_HSA_CODE),
Index: test/CodeGen/Mips/mips-shf-gprel.ll
===================================================================
--- /dev/null
+++ test/CodeGen/Mips/mips-shf-gprel.ll
@@ -0,0 +1,15 @@
+; Check that .sdata section has SHF_MIPS_GPREL flag.
+
+; RUN: llc -mips-ssection-threshold=16 -mgpopt -mattr=noabicalls \
+; RUN:     -relocation-model=static -march=mips -o - %s -filetype=obj \
+; RUN:   | llvm-readobj -s | FileCheck %s
+
+ at data = global [4 x i32] [i32 1, i32 2, i32 3, i32 4], align 4
+
+; CHECK:      Name: .sdata
+; CHECK-NEXT: Type: SHT_PROGBITS
+; CHECK-NEXT: Flags [ (0x10000003)
+; CHECK-NEXT:   SHF_ALLOC
+; CHECK-NEXT:   SHF_MIPS_GPREL
+; CHECK-NEXT:   SHF_WRITE
+; CHECK-NEXT: ]
Index: lib/Target/Mips/MipsTargetObjectFile.cpp
===================================================================
--- lib/Target/Mips/MipsTargetObjectFile.cpp
+++ lib/Target/Mips/MipsTargetObjectFile.cpp
@@ -41,10 +41,12 @@
   InitializeELF(TM.Options.UseInitArray);
 
   SmallDataSection = getContext().getELFSection(
-      ".sdata", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC);
+      ".sdata", ELF::SHT_PROGBITS,
+      ELF::SHF_WRITE | ELF::SHF_ALLOC | ELF::SHF_MIPS_GPREL);
 
   SmallBSSSection = getContext().getELFSection(".sbss", ELF::SHT_NOBITS,
-                                               ELF::SHF_WRITE | ELF::SHF_ALLOC);
+                                               ELF::SHF_WRITE | ELF::SHF_ALLOC |
+                                                   ELF::SHF_MIPS_GPREL);
   this->TM = &static_cast<const MipsTargetMachine &>(TM);
 }
 


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