[PATCH] D15724: AMDGPU/SI: fix scratch resource register allocation on Tonga & Iceland

[Nicolai Hähnle via llvm-commits]

nhaehnle created this revision.
nhaehnle added reviewers: arsenm, tstellarAMD.
nhaehnle added a subscriber: llvm-commits.
Herald added a subscriber: arsenm.

The correct number of available SGPRs needs to be taken into account here.

http://reviews.llvm.org/D15724

Files:
  lib/Target/AMDGPU/SIFrameLowering.cpp

Index: lib/Target/AMDGPU/SIFrameLowering.cpp
===================================================================
--- lib/Target/AMDGPU/SIFrameLowering.cpp
+++ lib/Target/AMDGPU/SIFrameLowering.cpp
@@ -121,7 +121,12 @@
     unsigned NumPreloaded = MFI->getNumPreloadedSGPRs() / 4;
     // Skip the last 2 elements because the last one is reserved for VCC, and
     // this is the 2nd to last element already.
-    for (MCPhysReg Reg : getAllSGPR128().drop_back(2).slice(NumPreloaded)) {
+    unsigned Drop = 2;
+
+    if (ST.hasSGPRInitBug())
+      Drop = 8;
+
+    for (MCPhysReg Reg : getAllSGPR128().drop_back(Drop).slice(NumPreloaded)) {
       // Pick the first unallocated one. Make sure we don't clobber the other
       // reserved input we needed.
       if (!MRI.isPhysRegUsed(Reg)) {


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