[PATCH] D15702: [AArch64] Optimize some simple TBZ/TBNZ cases.

[Geoff Berry via llvm-commits]

gberry added a comment.

Chad, Charlie,

Thanks for the review. I believe I have addressed all of your concerns.

Charlie, as to your question about folding opportunities, I don't think those should occur (they should have already been optimized).  I did a test run to detect if any of these cases show up and was unable to find a single occurrence.  I did however hit a few instances of a missing case of a tbz of an ashr that was essentially testing the carried-in sign bit (see the test case test18 for an example).  I added some new code to handle that case in the latest version of the change.


http://reviews.llvm.org/D15702