[PATCH] D15713: AVX512BW: Enable packed word shift for 512bit vector.

[Igor Breger via llvm-commits]

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AVX512BW: Enable packed word shift for 512bit vector. Enable lowering scalar immidiate shift v64i8 . 
Fix predicate for AVX1/2 shifts.  Lowering  variable shift v32i8 / v16i8 with AVX512BW and VLX  will be implement in different patch.

Repository:
  rL LLVM

http://reviews.llvm.org/D15713

Files:
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86InstrSSE.td
  test/CodeGen/X86/avx-isa-check.ll
  test/CodeGen/X86/vector-shift-ashr-512.ll
  test/CodeGen/X86/vector-shift-lshr-512.ll
  test/CodeGen/X86/vector-shift-shl-512.ll

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