[PATCH] D15026: [mips][microMIPS] Add R_MICROMIPS_PC18_S3 relocation
Daniel Sanders via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 18 07:10:55 PST 2015
dsanders accepted this revision.
dsanders added a comment.
This revision is now accepted and ready to land.
This patch LGTM but there's a quirk that we may need to worry about in some LLVM components (e.g. CodeGen, MCJIT, etc.) that I should mention.
This relocation and some of of the other new R_MICROMIPS_PC*_S* relocations have a slightly different concept of 'PC' compared to the relocations that came before. The difference is that the PC is rounded down to the specified alignment first whereas other relocations will happily use an unaligned PC. So the PC for R_MICROMIPS_PC18_S3 is 'PC & ~0x7'. I doubt there's much practical difference for the *_PC*_S2's and *_PC*_S1's because code needs to be correctly aligned anyway, but R_MICROMIPS_PC18_S3 requires a greater alignment than code does and may expose the difference more easily.
Another slight difference is that both the symbol and addend must be correctly aligned rather than merely that the sum of the two is correctly aligned. I'm told this is so that REL and RELA have the same constraints.
http://reviews.llvm.org/D15026
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