[PATCH] D15592: [LICM] Make store promotion work in the face of unordered atomics

[Philip Reames via llvm-commits]

reames created this revision.
reames added reviewers: jfb, hfinkel, majnemer, sanjoy.
reames added a subscriber: llvm-commits.

Extend our store promotion code to deal with unordered atomic accesses.  Ordered atomics continue to be unhandled.  

Most of the change is straight-forward, the only complicated bit is in the reasoning around mixing of atomic and non-atomic memory access.  Rather than trying to reason about the complex semantics in these cases, I simply disallowed promotion when both atomic and non-atomic accesses are present.  This is conservatively correct.

It seems really tempting to just promote all access to atomics, but the original accesses might have been conditional.  Since we can't lower an arbitrary atomic type, it might not be safe to promote all access to atomic.  Consider a loop like the following:
while(b) {
  load i128 ...
  if (can lower i128 atomic)
    store atomic i128 ...
  else
    store i128 
}

It could be there's no race on the location and thus the code is perfectly well defined even if we can't lower a i128 atomically.  Promoting the non-atomic accesses to atomic would be incorrect.

http://reviews.llvm.org/D15592

Files:
  lib/Transforms/Scalar/LICM.cpp
  test/Transforms/LICM/atomics.ll
  test/Transforms/LICM/scalar_promote.ll

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