[PATCH] D15538: [WebAssembly] Implement instruction selection for constant offsets in addresses.

[Dan Gohman via llvm-commits]

sunfish created this revision.
sunfish added subscribers: jfb, dschuff, llvm-commits.
sunfish set the repository for this revision to rL LLVM.

Add instruction patterns for matching load and store instructions with constant offsets in addresses. The code is fairly redundant due to the need to replicate everything between imm, tglobaldadr, and texternalsym, but this appears to be common tablegen practice. The main alternative appears to be to introduce matching functions with C++ code, but sticking with purely generated matchers seems better for now.

Also note that this doesn't yet support offsets from getelementptr, which will be the most common case; that will depend on a change in target-independent code in order to set the NoUnsignedWrap flag, which I'll submit separately. Until then, the testcase uses ptrtoint+add+inttoptr with a nuw on the add.

Also implement isLegalAddressingMode with an approximation of this.

Repository:
  rL LLVM

http://reviews.llvm.org/D15538

Files:
  lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
  lib/Target/WebAssembly/WebAssemblyISelLowering.h
  lib/Target/WebAssembly/WebAssemblyInstrMemory.td
  test/CodeGen/WebAssembly/global.ll
  test/CodeGen/WebAssembly/offset.ll
  test/CodeGen/WebAssembly/store-results.ll

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