[PATCH] D15491: [X86] adding pku feature flag
Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 15 05:38:58 PST 2015
This revision was automatically updated to reflect the committed changes.
Closed by commit rL255644: [x86] adding PKU feature flag (authored by abadouh).
Changed prior to commit:
http://reviews.llvm.org/D15491?vs=42708&id=42840#toc
Repository:
rL LLVM
http://reviews.llvm.org/D15491
Files:
llvm/trunk/lib/Support/Host.cpp
llvm/trunk/lib/Target/X86/X86.td
llvm/trunk/lib/Target/X86/X86InstrInfo.td
llvm/trunk/lib/Target/X86/X86Subtarget.cpp
llvm/trunk/lib/Target/X86/X86Subtarget.h
Index: llvm/trunk/lib/Target/X86/X86.td
===================================================================
--- llvm/trunk/lib/Target/X86/X86.td
+++ llvm/trunk/lib/Target/X86/X86.td
@@ -134,6 +134,8 @@
def FeatureVLX : SubtargetFeature<"avx512vl", "HasVLX", "true",
"Enable AVX-512 Vector Length eXtensions",
[FeatureAVX512]>;
+def FeaturePKU : SubtargetFeature<"pku", "HasPKU", "true",
+ "Enable protection keys">;
def FeaturePCLMUL : SubtargetFeature<"pclmul", "HasPCLMUL", "true",
"Enable packed carry-less multiplication instructions",
[FeatureSSE2]>;
@@ -491,6 +493,7 @@
FeatureDQI,
FeatureBWI,
FeatureVLX,
+ FeaturePKU,
FeatureCMPXCHG16B,
FeatureSlowBTMem,
FeaturePOPCNT,
Index: llvm/trunk/lib/Target/X86/X86Subtarget.h
===================================================================
--- llvm/trunk/lib/Target/X86/X86Subtarget.h
+++ llvm/trunk/lib/Target/X86/X86Subtarget.h
@@ -223,6 +223,9 @@
/// Processor has AVX-512 Vector Length eXtenstions
bool HasVLX;
+ /// Processor has PKU extenstions
+ bool HasPKU;
+
/// Processot supports MPX - Memory Protection Extensions
bool HasMPX;
@@ -398,6 +401,7 @@
bool hasDQI() const { return HasDQI; }
bool hasBWI() const { return HasBWI; }
bool hasVLX() const { return HasVLX; }
+ bool hasPKU() const { return HasPKU; }
bool hasMPX() const { return HasMPX; }
bool isAtom() const { return X86ProcFamily == IntelAtom; }
Index: llvm/trunk/lib/Target/X86/X86InstrInfo.td
===================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td
@@ -771,6 +771,7 @@
def NoVLX : Predicate<"!Subtarget->hasVLX()">;
def NoVLX_Or_NoBWI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasBWI()">;
def NoVLX_Or_NoDQI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasDQI()">;
+def PKU : Predicate<"!Subtarget->hasPKU()">;
def HasPOPCNT : Predicate<"Subtarget->hasPOPCNT()">;
def HasAES : Predicate<"Subtarget->hasAES()">;
Index: llvm/trunk/lib/Target/X86/X86Subtarget.cpp
===================================================================
--- llvm/trunk/lib/Target/X86/X86Subtarget.cpp
+++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp
@@ -270,6 +270,7 @@
HasBWI = false;
HasVLX = false;
HasADX = false;
+ HasPKU = false;
HasSHA = false;
HasPRFCHW = false;
HasRDSEED = false;
Index: llvm/trunk/lib/Support/Host.cpp
===================================================================
--- llvm/trunk/lib/Support/Host.cpp
+++ llvm/trunk/lib/Support/Host.cpp
@@ -812,6 +812,8 @@
Features["rdseed"] = HasLeaf7 && ((EBX >> 18) & 1);
Features["adx"] = HasLeaf7 && ((EBX >> 19) & 1);
Features["sha"] = HasLeaf7 && ((EBX >> 29) & 1);
+ // Enable protection keys
+ Features["pku"] = HasLeaf7 && ((ECX >> 4) & 1);
// AVX512 is only supported if the OS supports the context save for it.
Features["avx512f"] = HasLeaf7 && ((EBX >> 16) & 1) && HasAVX512Save;
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