[PATCH] D15477: [X86][AVX] Only shuffle the lower half of vectors if the upper half is undefined

[Simon Pilgrim via llvm-commits]

RKSimon updated this revision to Diff 42838.
RKSimon added a comment.

Updated based on Elena's feedback.

I've enabled 512-bit support without any trouble.

We are missing some vpermq/vpermpd patterns - maybe worth disabling 4i64/4f64 shuffles with UndefLower on AVX2? The latencies of the 2 approaches appear to be very similar.


Repository:
  rL LLVM

http://reviews.llvm.org/D15477

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/avx-splat.ll
  test/CodeGen/X86/vector-shuffle-256-v16.ll
  test/CodeGen/X86/vector-shuffle-256-v32.ll
  test/CodeGen/X86/vector-shuffle-256-v4.ll
  test/CodeGen/X86/vector-shuffle-256-v8.ll
  test/CodeGen/X86/vector-shuffle-512-v16.ll
  test/CodeGen/X86/vector-shuffle-512-v32.ll
  test/CodeGen/X86/vector-zext.ll

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