[PATCH] D14971: X86: Emit smaller code for moving 8-bit immediates

[David Kreitzer via llvm-commits]

DavidKreitzer added inline comments.

================
Comment at: lib/Target/X86/X86InstrCompiler.td:270
@@ +269,3 @@
+  let Defs = [EFLAGS], isReMaterializable = 1, isPseudo = 1 in {
+    def MOV32r1 : I<0, Pseudo, (outs GR32:$dst), (ins), "",
+                        [(set GR32:$dst, 1)]>;
----------------
What is the advantage of defining new pseudo-ops for mov 1 and mov -1 vs. simply using MOV32ri and expanding it post-RA where you could consider all the relevant factors such as OptForSize, OptForMinSize, the immediate value, whether the destination register requires REX, etc.?

I suppose the pseudos convey your intent to later expand to xor+inc/dec, but that hardly seems to justify the added complexity.

The new pseudos are consistent with what's being done with MOV32r0, so my question applies equally to the existing MOV32r0 code.

================
Comment at: lib/Target/X86/X86InstrInfo.cpp:2483
@@ -2480,3 +2482,3 @@
     BuildMI(MBB, I, DL, get(X86::MOV32ri)).addOperand(Orig->getOperand(0))
       .addImm(0);
   } else {
----------------
The immediate value needs to be adjusted for MOV32r1/MOV32r_1.



http://reviews.llvm.org/D14971