[PATCH] D14822: [mips][microMIPS] Add R_MICROMIPS_PC26_S1 relocation

[Zoran Jovanovic via llvm-commits]

zoran.jovanovic added inline comments.

================
Comment at: lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp:370
@@ +369,3 @@
+  const MCExpr *FixupExpression = MCBinaryExpr::createAdd(
+      MO.getExpr(), MCConstantExpr::create(-4, Ctx), Ctx);
+  Fixups.push_back(MCFixup::create(0, FixupExpression,
----------------
dsanders wrote:
> Is it still -4 when we're shifting by 1 instead of 2?
If my understanding is correct -4 is defined only by the size of current instruction (balc and bc in this case) and it is 4 bytes:
"... is added to the address of the instruction following the
branch (not the branch itself), to form a PC-relative effective target address"
" Operation:
target_offset <- sign_extend( offset || 01 )
GPR[31] <- PC+4
PC <- PC+4 + sign_extend(target_offset)"




http://reviews.llvm.org/D14822